See "SQDMLSLT (vectors)" in the exploration tools

SQDMLSLT (vectors): Signed saturating doubling multiply-subtract long from accumulator (top)

SQDMLSLT Zda.S, Zn.H, Zm.H (SVE2 (SME

svint32_t svqdmlslt[_s32](svint32_t op1, svint16_t op2, svint16_t op3)

128-bit SVE

For each odd signed 16-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFF or −0x80000000.

256-bit SVE

For each odd signed 16-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFF or −0x80000000.

512-bit SVE

For each odd signed 16-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFF or −0x80000000.

Larger sizes

1024-bit SVE

For each odd signed 16-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFF or −0x80000000.

2048-bit SVE

For each odd signed 16-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFF or −0x80000000.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.