See "SQDMLSLT (vectors)" in the exploration tools

SQDMLSLT (vectors): Signed saturating doubling multiply-subtract long from accumulator (top)

SQDMLSLT Zda.D, Zn.S, Zm.S (SVE2 (SME

svint64_t svqdmlslt[_s64](svint64_t op1, svint32_t op2, svint32_t op3)

128-bit SVE

For each odd signed 32-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFFFFFFFFFF or −0x8000000000000000.

256-bit SVE

For each odd signed 32-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFFFFFFFFFF or −0x8000000000000000.

512-bit SVE

For each odd signed 32-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFFFFFFFFFF or −0x8000000000000000.

Larger sizes

1024-bit SVE

For each odd signed 32-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFFFFFFFFFF or −0x8000000000000000.

2048-bit SVE

For each odd signed 32-bit integer set the double-width (4) to sat( (3) − sat( (1) * (2) << 1 ) ), with signed saturation to 0x7FFFFFFFFFFFFFFF or −0x8000000000000000.

Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.