SVE Instruction List by Dougall Johnson
SQINCP (vector): Signed saturating increment vector by count of true predicate elements
SQINCP Zdn.D, Pm.D (SVE (SME
128-bit SVE
Count the non-zero predicate bits corresponding to 64-bit elements from (1), then add the total to each 64-bit element from (2), with signed saturation to 0x7FFFFFFFFFFFFFFF, setting (3) to the result.
256-bit SVE
Count the non-zero predicate bits corresponding to 64-bit elements from (1), then add the total to each 64-bit element from (2), with signed saturation to 0x7FFFFFFFFFFFFFFF, setting (3) to the result.
512-bit SVE
Count the non-zero predicate bits corresponding to 64-bit elements from (1), then add the total to each 64-bit element from (2), with signed saturation to 0x7FFFFFFFFFFFFFFF, setting (3) to the result.
Larger sizes
1024-bit SVE
Count the non-zero predicate bits corresponding to 64-bit elements from (1), then add the total to each 64-bit element from (2), with signed saturation to 0x7FFFFFFFFFFFFFFF, setting (3) to the result.
2048-bit SVE
Count the non-zero predicate bits corresponding to 64-bit elements from (1), then add the total to each 64-bit element from (2), with signed saturation to 0x7FFFFFFFFFFFFFFF, setting (3) to the result.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.