SVE Instruction List by Dougall Johnson
SQRDMLAH (vectors): Signed saturating rounding doubling multiply-add high to accumulator (unpredicated)
SQRDMLAH Zda.H, Zn.H, Zm.H (SVE2 (SME
svint16_t svqrdmlah[_s16](svint16_t op1, svint16_t op2, svint16_t op3)
128-bit SVE
For each signed 16-bit integer set (4) to ( ( (1) << 15 ) + (2) * (3) + 0x4000 ) >> 15, with signed saturation to 0x7FFF or −0x8000.
256-bit SVE
For each signed 16-bit integer set (4) to ( ( (1) << 15 ) + (2) * (3) + 0x4000 ) >> 15, with signed saturation to 0x7FFF or −0x8000.
512-bit SVE
For each signed 16-bit integer set (4) to ( ( (1) << 15 ) + (2) * (3) + 0x4000 ) >> 15, with signed saturation to 0x7FFF or −0x8000.
Larger sizes
1024-bit SVE
For each signed 16-bit integer set (4) to ( ( (1) << 15 ) + (2) * (3) + 0x4000 ) >> 15, with signed saturation to 0x7FFF or −0x8000.
2048-bit SVE
For each signed 16-bit integer set (4) to ( ( (1) << 15 ) + (2) * (3) + 0x4000 ) >> 15, with signed saturation to 0x7FFF or −0x8000.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.