SVE Instruction List by Dougall Johnson
SQRDMLSH (vectors): Signed saturating rounding doubling multiply-subtract high from accumulator (unpredicated)
SQRDMLSH Zda.S, Zn.S, Zm.S (SVE2 (SME
svint32_t svqrdmlsh[_s32](svint32_t op1, svint32_t op2, svint32_t op3)
128-bit SVE
For each signed 32-bit integer set (4) to ( ( (1) << 31 ) − (2) * (3) + 0x40000000 ) >> 31, with signed saturation to 0x7FFFFFFF or −0x80000000.
256-bit SVE
For each signed 32-bit integer set (4) to ( ( (1) << 31 ) − (2) * (3) + 0x40000000 ) >> 31, with signed saturation to 0x7FFFFFFF or −0x80000000.
512-bit SVE
For each signed 32-bit integer set (4) to ( ( (1) << 31 ) − (2) * (3) + 0x40000000 ) >> 31, with signed saturation to 0x7FFFFFFF or −0x80000000.
Larger sizes
1024-bit SVE
For each signed 32-bit integer set (4) to ( ( (1) << 31 ) − (2) * (3) + 0x40000000 ) >> 31, with signed saturation to 0x7FFFFFFF or −0x80000000.
2048-bit SVE
For each signed 32-bit integer set (4) to ( ( (1) << 31 ) − (2) * (3) + 0x40000000 ) >> 31, with signed saturation to 0x7FFFFFFF or −0x80000000.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.