SVE Instruction List by Dougall Johnson
See "SQRSHRNT" in the exploration tools

SQRSHRNT: Signed saturating rounding shift right narrow by immediate (top)

SQRSHRNT Zd.S, Zn.D, #const (SVE2 (SME
svint32_t svqrshrnt[_n_s64](svint32_t even, svint64_t op1, uint64_t imm2)

128-bit SVE

For each signed 64-bit integer set the odd 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with signed saturation to 0x7FFFFFFF or −0x80000000, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

256-bit SVE

For each signed 64-bit integer set the odd 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with signed saturation to 0x7FFFFFFF or −0x80000000, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

512-bit SVE

For each signed 64-bit integer set the odd 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with signed saturation to 0x7FFFFFFF or −0x80000000, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

Larger sizes

1024-bit SVE

For each signed 64-bit integer set the odd 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with signed saturation to 0x7FFFFFFF or −0x80000000, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

2048-bit SVE

For each signed 64-bit integer set the odd 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with signed saturation to 0x7FFFFFFF or −0x80000000, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.