SVE Instruction List by Dougall Johnson
See "SQRSHRUNB" in the exploration tools

SQRSHRUNB: Signed saturating rounding shift right unsigned narrow by immediate (bottom)

SQRSHRUNB Zd.S, Zn.D, #const (SVE2 (SME
svuint32_t svqrshrunb[_n_s64](svint64_t op1, uint64_t imm2)

128-bit SVE

For each signed 64-bit integer set the even 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, with unsigned saturation to 0 (if (1) is negative) or 0xFFFFFFFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

256-bit SVE

For each signed 64-bit integer set the even 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, with unsigned saturation to 0 (if (1) is negative) or 0xFFFFFFFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

512-bit SVE

For each signed 64-bit integer set the even 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, with unsigned saturation to 0 (if (1) is negative) or 0xFFFFFFFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

Larger sizes

1024-bit SVE

For each signed 64-bit integer set the even 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, with unsigned saturation to 0 (if (1) is negative) or 0xFFFFFFFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

2048-bit SVE

For each signed 64-bit integer set the even 32-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, with unsigned saturation to 0 (if (1) is negative) or 0xFFFFFFFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 32.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.