SVE Instruction List by Dougall Johnson
SQSHL (vectors): Signed saturating shift left by vector (predicated)
SQSHL Zdn.S, Pg/M, Zdn.S, Zm.S (SVE2 (SME
svint32_t svqshl[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2)
128-bit SVE
Shift each signed 32-bit integer from (1) by the corresponding signed 32-bit integer from (2), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (2), otherwise it shifts right by −(2).
256-bit SVE
Shift each signed 32-bit integer from (1) by the corresponding signed 32-bit integer from (2), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (2), otherwise it shifts right by −(2).
512-bit SVE
Shift each signed 32-bit integer from (1) by the corresponding signed 32-bit integer from (2), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (2), otherwise it shifts right by −(2).
Larger sizes
1024-bit SVE
Shift each signed 32-bit integer from (1) by the corresponding signed 32-bit integer from (2), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (2), otherwise it shifts right by −(2).
2048-bit SVE
Shift each signed 32-bit integer from (1) by the corresponding signed 32-bit integer from (2), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (2), otherwise it shifts right by −(2).
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.