SVE Instruction List by Dougall Johnson
SQSHLR: Signed saturating shift left reversed vectors (predicated)
SQSHLR Zdn.S, Pg/M, Zdn.S, Zm.S (SVE2 (SME
128-bit SVE
Shift each signed 32-bit integer from (2) by the corresponding signed 32-bit integer from (1), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (1), otherwise it shifts right by −(1).
256-bit SVE
Shift each signed 32-bit integer from (2) by the corresponding signed 32-bit integer from (1), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (1), otherwise it shifts right by −(1).
512-bit SVE
Shift each signed 32-bit integer from (2) by the corresponding signed 32-bit integer from (1), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (1), otherwise it shifts right by −(1).
Larger sizes
1024-bit SVE
Shift each signed 32-bit integer from (2) by the corresponding signed 32-bit integer from (1), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (1), otherwise it shifts right by −(1).
2048-bit SVE
Shift each signed 32-bit integer from (2) by the corresponding signed 32-bit integer from (1), with signed saturation to 0x7FFFFFFF or −0x80000000 on overflow, setting (3) to the result. If (1) ≥ 0, this shifts left by (1), otherwise it shifts right by −(1).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.