SVE Instruction List by Dougall Johnson
SQSHRN: Signed saturating shift right narrow by immediate to interleaved integer
SQSHRN Zd.H, { Zn1.S, Zn2.S }, #const (SVE2.3 (SME2.3
128-bit SVE
For each signed 32-bit integer element e from (1) and (2) compute e >> const, truncating to 16-bit with signed saturation to 0x7FFF or −0x8000. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2). The shift amount is limited to 1 ≤ const ≤ 16.
256-bit SVE
For each signed 32-bit integer element e from (1) and (2) compute e >> const, truncating to 16-bit with signed saturation to 0x7FFF or −0x8000. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2). The shift amount is limited to 1 ≤ const ≤ 16.
512-bit SVE
For each signed 32-bit integer element e from (1) and (2) compute e >> const, truncating to 16-bit with signed saturation to 0x7FFF or −0x8000. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2). The shift amount is limited to 1 ≤ const ≤ 16.
Larger sizes
1024-bit SVE
For each signed 32-bit integer element e from (1) and (2) compute e >> const, truncating to 16-bit with signed saturation to 0x7FFF or −0x8000. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2). The shift amount is limited to 1 ≤ const ≤ 16.
2048-bit SVE
For each signed 32-bit integer element e from (1) and (2) compute e >> const, truncating to 16-bit with signed saturation to 0x7FFF or −0x8000. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2). The shift amount is limited to 1 ≤ const ≤ 16.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.