SVE Instruction List by Dougall Johnson
SSHLLT: Signed shift left long by immediate (top)
SSHLLT Zd.H, Zn.B, #const (SVE2 (SME
svint16_t svshllt[_n_s16](svint8_t op1, uint64_t imm2)
128-bit SVE

For each odd signed 8-bit integer set the double-width (2) to (1) << const. The shift amount is limited to 0 ≤ const ≤ 7.
256-bit SVE

For each odd signed 8-bit integer set the double-width (2) to (1) << const. The shift amount is limited to 0 ≤ const ≤ 7.
512-bit SVE

For each odd signed 8-bit integer set the double-width (2) to (1) << const. The shift amount is limited to 0 ≤ const ≤ 7.
Larger sizes
1024-bit SVE

For each odd signed 8-bit integer set the double-width (2) to (1) << const. The shift amount is limited to 0 ≤ const ≤ 7.
2048-bit SVE

For each odd signed 8-bit integer set the double-width (2) to (1) << const. The shift amount is limited to 0 ≤ const ≤ 7.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.