SVE Instruction List by Dougall Johnson
ST1W (scalar plus immediate, single register): Contiguous store words from vector (immediate index)
ST1W { Zt.S }, Pg, [Xn{, #imm, MUL VL}] (SVE (SME
void svst1_vnum[_f32](svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t data)
void svst1_vnum[_s32](svbool_t pg, int32_t *base, int64_t vnum, svint32_t data)
void svst1_vnum[_u32](svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t data)
128-bit SVE
Store each active 32-bit element of (1) to the memory operand (3). If the corresponding predicate bit from (2) is zero, that store is skipped, and cannot cause a fault, and the corresponding value in memory is unchanged.
256-bit SVE
Store each active 32-bit element of (1) to the memory operand (3). If the corresponding predicate bit from (2) is zero, that store is skipped, and cannot cause a fault, and the corresponding value in memory is unchanged.
512-bit SVE
Store each active 32-bit element of (1) to the memory operand (3). If the corresponding predicate bit from (2) is zero, that store is skipped, and cannot cause a fault, and the corresponding value in memory is unchanged.
Larger sizes
1024-bit SVE
Store each active 32-bit element of (1) to the memory operand (3). If the corresponding predicate bit from (2) is zero, that store is skipped, and cannot cause a fault, and the corresponding value in memory is unchanged.
2048-bit SVE
Store each active 32-bit element of (1) to the memory operand (3). If the corresponding predicate bit from (2) is zero, that store is skipped, and cannot cause a fault, and the corresponding value in memory is unchanged.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.