SVE Instruction List by Dougall Johnson
ST2D (scalar plus scalar): Contiguous store two-doubleword structures from two vectors (scalar index)
ST2D { Zt1.D, Zt2.D }, Pg, [Xn, Xm, LSL #3] (SVE (SME
void svst2[_f64](svbool_t pg, float64_t *base, svfloat64x2_t data)
void svst2[_s64](svbool_t pg, int64_t *base, svint64x2_t data)
void svst2[_u64](svbool_t pg, uint64_t *base, svuint64x2_t data)
128-bit SVE
Interleave 64-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
256-bit SVE
Interleave 64-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
512-bit SVE
Interleave 64-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
Larger sizes
1024-bit SVE
Interleave 64-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
2048-bit SVE
Interleave 64-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.