SVE Instruction List by Dougall Johnson
ST2H (scalar plus immediate): Contiguous store two-halfword structures from two vectors (immediate index)
ST2H { Zt1.H, Zt2.H }, Pg, [Xn{, #imm, MUL VL}] (SVE (SME
void svst2_vnum[_bf16](svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x2_t data)
void svst2_vnum[_f16](svbool_t pg, float16_t *base, int64_t vnum, svfloat16x2_t data)
void svst2_vnum[_s16](svbool_t pg, int16_t *base, int64_t vnum, svint16x2_t data)
void svst2_vnum[_u16](svbool_t pg, uint16_t *base, int64_t vnum, svuint16x2_t data)
128-bit SVE
Interleave 16-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
256-bit SVE
Interleave 16-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
512-bit SVE
Interleave 16-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
Larger sizes
1024-bit SVE
Interleave 16-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
2048-bit SVE
Interleave 16-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.