SVE Instruction List by Dougall Johnson
ST2W (scalar plus scalar): Contiguous store two-word structures from two vectors (scalar index)
ST2W { Zt1.S, Zt2.S }, Pg, [Xn, Xm, LSL #2] (SVE (SME
void svst2[_f32](svbool_t pg, float32_t *base, svfloat32x2_t data)
void svst2[_s32](svbool_t pg, int32_t *base, svint32x2_t data)
void svst2[_u32](svbool_t pg, uint32_t *base, svuint32x2_t data)
128-bit SVE
Interleave 32-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
256-bit SVE
Interleave 32-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
512-bit SVE
Interleave 32-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
Larger sizes
1024-bit SVE
Interleave 32-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
2048-bit SVE
Interleave 32-bit elements from two consecutive registers (2) and (3), and store them to the memory operand (4). If the predicate bit from (1) corresponding to an element in (2) and (3) is zero, those two contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.