SVE Instruction List by Dougall Johnson
ST4D (scalar plus scalar): Contiguous store four-doubleword structures from four vectors (scalar index)
ST4D { Zt1.D, Zt2.D, Zt3.D, Zt4.D }, Pg, [Xn, Xm, LSL #3] (SVE (SME
void svst4[_f64](svbool_t pg, float64_t *base, svfloat64x4_t data)
void svst4[_s64](svbool_t pg, int64_t *base, svint64x4_t data)
void svst4[_u64](svbool_t pg, uint64_t *base, svuint64x4_t data)
128-bit SVE
Interleave 64-bit elements from four consecutive registers (2), (3), (4), and (5), and store them to the memory operand (6). If the predicate bit from (1) corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
256-bit SVE
Interleave 64-bit elements from four consecutive registers (2), (3), (4), and (5), and store them to the memory operand (6). If the predicate bit from (1) corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
512-bit SVE
Interleave 64-bit elements from four consecutive registers (2), (3), (4), and (5), and store them to the memory operand (6). If the predicate bit from (1) corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
Larger sizes
1024-bit SVE
Interleave 64-bit elements from four consecutive registers (2), (3), (4), and (5), and store them to the memory operand (6). If the predicate bit from (1) corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
2048-bit SVE
Interleave 64-bit elements from four consecutive registers (2), (3), (4), and (5), and store them to the memory operand (6). If the predicate bit from (1) corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous stores are skipped, and cannot cause a fault, and the corresponding values in memory are unchanged.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.