SVE Instruction List by Dougall Johnson
See "STNT1H (scalar plus scalar, single register)" in the exploration tools

STNT1H (scalar plus scalar, single register): Contiguous store non-temporal halfwords from vector (scalar index)

STNT1H { Zt.H }, Pg, [Xn, Xm, LSL #1] (SVE (SME
void svstnt1[_bf16](svbool_t pg, bfloat16_t *base, svbfloat16_t data)
void svstnt1[_f16](svbool_t pg, float16_t *base, svfloat16_t data)
void svstnt1[_s16](svbool_t pg, int16_t *base, svint16_t data)
void svstnt1[_u16](svbool_t pg, uint16_t *base, svuint16_t data)

128-bit SVE

See the documentation for more information.

256-bit SVE

See the documentation for more information.

512-bit SVE

See the documentation for more information.

Larger sizes

1024-bit SVE

See the documentation for more information.

2048-bit SVE

See the documentation for more information.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.