SVE Instruction List by Dougall Johnson
SXTH: Signed halfword extend (predicated)
SXTH Zd.S, Pg/M, Zn.S (SVE (SME
svint32_t svexth[_s32]_m(svint32_t inactive, svbool_t pg, svint32_t op)
128-bit SVE

For each 32-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 32-bit.
256-bit SVE

For each 32-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 32-bit.
512-bit SVE

For each 32-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 32-bit.
Larger sizes
1024-bit SVE

For each 32-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 32-bit.
2048-bit SVE

For each 32-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 32-bit.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.