SVE Instruction List by Dougall Johnson
SXTH: Signed halfword extend (predicated)
SXTH Zd.D, Pg/M, Zn.D (SVE (SME
svint64_t svexth[_s64]_m(svint64_t inactive, svbool_t pg, svint64_t op)
128-bit SVE
For each 64-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 64-bit.
256-bit SVE
For each 64-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 64-bit.
512-bit SVE
For each 64-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 64-bit.
Larger sizes
1024-bit SVE
For each 64-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 64-bit.
2048-bit SVE
For each 64-bit value integer set (2) to ( (1) & 0x7FFF ) − ( (1) & 0x8000 ). This takes the low 16-bits of (1), and sign-extends it to 64-bit.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.