TBL: Programmable table lookup in one or two vector table (zeroing)

TBL Zd.B, { Zn1.B, Zn2.B }, Zm.B (SVE2 (SME

svint8_t svtbl2[_s8](svint8x2_t data, svuint8_t indices)

svuint8_t svtbl2[_u8](svuint8x2_t data, svuint8_t indices)

128-bit SVE

For each 8-bit index from (2), if 0 ≤ index < 32, set (3) to the 8-bit element at that index in the two-register table (1), otherwise set (3) to zero.

256-bit SVE

For each 8-bit index from (2), if 0 ≤ index < 64, set (3) to the 8-bit element at that index in the two-register table (1), otherwise set (3) to zero.

512-bit SVE

For each 8-bit index from (2), if 0 ≤ index < 128, set (3) to the 8-bit element at that index in the two-register table (1), otherwise set (3) to zero.

Larger sizes

1024-bit SVE

For each 8-bit index from (2), set (3) to the 8-bit element at that index in the two-register table (1). Optional zeroing is not possible on 1024-bit SVE.

2048-bit SVE

For each 8-bit index from (2), set (3) to the 8-bit element at that index in the two-register table (1). Optional zeroing is not possible, and only the first register of the two-register table will be used on 2048-bit SVE.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.