SVE Instruction List by Dougall Johnson
UMULH (unpredicated): Unsigned multiply returning high half (unpredicated)
UMULH Zd.H, Zn.H, Zm.H (SVE2 (SME
128-bit SVE

For each unsigned 16-bit integer set (3) to ( (1) * (2) ) >> 16.
256-bit SVE

For each unsigned 16-bit integer set (3) to ( (1) * (2) ) >> 16.
512-bit SVE

For each unsigned 16-bit integer set (3) to ( (1) * (2) ) >> 16.
Larger sizes
1024-bit SVE

For each unsigned 16-bit integer set (3) to ( (1) * (2) ) >> 16.
2048-bit SVE

For each unsigned 16-bit integer set (3) to ( (1) * (2) ) >> 16.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.