SVE Instruction List by Dougall Johnson
See "UQRSHRNB" in the exploration tools

UQRSHRNB: Unsigned saturating rounding shift right narrow by immediate (bottom)

UQRSHRNB Zd.B, Zn.H, #const (SVE2 (SME
svuint8_t svqrshrnb[_n_u16](svuint16_t op1, uint64_t imm2)

128-bit SVE

For each unsigned 16-bit integer set the even 8-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with unsigned saturation to 0xFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 8.

256-bit SVE

For each unsigned 16-bit integer set the even 8-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with unsigned saturation to 0xFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 8.

512-bit SVE

For each unsigned 16-bit integer set the even 8-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with unsigned saturation to 0xFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 8.

Larger sizes

1024-bit SVE

For each unsigned 16-bit integer set the even 8-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with unsigned saturation to 0xFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 8.

2048-bit SVE

For each unsigned 16-bit integer set the even 8-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, truncating with unsigned saturation to 0xFF, and zero odd elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 8.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.