SVE Instruction List by Dougall Johnson
UZP1 (vectors): Concatenate even elements from two vectors
UZP1 Zd.H, Zn.H, Zm.H (SVE (SME
svbfloat16_t svuzp1[_bf16](svbfloat16_t op1, svbfloat16_t op2)
svfloat16_t svuzp1[_f16](svfloat16_t op1, svfloat16_t op2)
svint16_t svuzp1[_s16](svint16_t op1, svint16_t op2)
svuint16_t svuzp1[_u16](svuint16_t op1, svuint16_t op2)
128-bit SVE
Set the low half of (3) to the even 16-bit elements from (1), and the high half of (3) to the even 16-bit elements from (2).
256-bit SVE
Set the low half of (3) to the even 16-bit elements from (1), and the high half of (3) to the even 16-bit elements from (2).
512-bit SVE
Set the low half of (3) to the even 16-bit elements from (1), and the high half of (3) to the even 16-bit elements from (2).
Larger sizes
1024-bit SVE
Set the low half of (3) to the even 16-bit elements from (1), and the high half of (3) to the even 16-bit elements from (2).
2048-bit SVE
Set the low half of (3) to the even 16-bit elements from (1), and the high half of (3) to the even 16-bit elements from (2).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.