SVE Instruction List by Dougall Johnson
XAR: Bitwise exclusive OR and rotate right by immediate
XAR Zdn.H, Zdn.H, Zm.H, #const (SVE2 (SME
svint16_t svxar[_n_s16](svint16_t op1, svint16_t op2, uint64_t imm3)
svuint16_t svxar[_n_u16](svuint16_t op1, svuint16_t op2, uint64_t imm3)
128-bit SVE
For each 16-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 16 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 16.
256-bit SVE
For each 16-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 16 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 16.
512-bit SVE
For each 16-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 16 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 16.
Larger sizes
1024-bit SVE
For each 16-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 16 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 16.
2048-bit SVE
For each 16-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 16 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 16.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.