SVE Instruction List by Dougall Johnson
XAR: Bitwise exclusive OR and rotate right by immediate
XAR Zdn.S, Zdn.S, Zm.S, #const (SVE2 (SME
svint32_t svxar[_n_s32](svint32_t op1, svint32_t op2, uint64_t imm3)
svuint32_t svxar[_n_u32](svuint32_t op1, svuint32_t op2, uint64_t imm3)
128-bit SVE
For each 32-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 32 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 32.
256-bit SVE
For each 32-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 32 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 32.
512-bit SVE
For each 32-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 32 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 32.
Larger sizes
1024-bit SVE
For each 32-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 32 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 32.
2048-bit SVE
For each 32-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 32 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 32.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.