SVE Instruction List by Dougall Johnson
XAR: Bitwise exclusive OR and rotate right by immediate
XAR Zdn.D, Zdn.D, Zm.D, #const (SVE2 (SME
svint64_t svxar[_n_s64](svint64_t op1, svint64_t op2, uint64_t imm3)
svuint64_t svxar[_n_u64](svuint64_t op1, svuint64_t op2, uint64_t imm3)
128-bit SVE
For each 64-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 64 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 64.
256-bit SVE
For each 64-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 64 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 64.
512-bit SVE
For each 64-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 64 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 64.
Larger sizes
1024-bit SVE
For each 64-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 64 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 64.
2048-bit SVE
For each 64-bit unsigned integer set (3) to (1) ^ (2) rotated right by const. This can be also be written as ( ( (1) ^ (2) ) >> const ) | ( ( (1) ^ (2) ) << ( 64 − const ) ). The rotate amount is limited to 1 ≤ const ≤ 64.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.