Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

BIC (vector, immediate, 4S)

Test 1: uops

Code:

  bic v0.4s, #1
  movi v0.16b, 1

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500821686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110001073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371500611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371600611686251000100010002645212018203720371571318951000100010002037203711100110003073116111786100020382038203820382038

Test 2: Latency 1->1

Code:

  bic v0.4s, #1
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b1e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150000061196862510100100100001001000050028475211200182003720037184287187411010020010000200100002003720037111020110099100100100001000011171701600198000100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028475210200182003720037184286187411010020010008200100082003720037111020110099100100100001000011171801600198000100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028475211200182003720037184286187411010020010008200100082003720037111020110099100100100001000011171701600198640100001002003820038200382003820038
102042003715000001597196862510100100100001001000050028475210200182003720037184286187411010020010008200100082003720037111020110099100100100001000011171701600198000100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028475210200182003720037184286187401010020010008200100082003720037111020110099100100100001000011171701610198000100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028475211200542003720037184287187401010020010008200100082003720037111020110099100100100001000011171801600198010100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028475210200182003720037184287187411010020010008200100082003720037111020110099100100100001000011171701600198010100001002003820038200382003820038
1020420037150000061196862510100100100001001000050028513131200182003720037184287187411010020010008200100082003720037111020110099100100100001004011171701600198000100001002003820038200382003820038
1020420037150000061196862510114106100001001000050028475211200182003720037184286187411010020010008200100082003720037111020110099100100100001000011171801600198010100001002003820038201822003820038
1020420037150000061196862510100100100001001000050028475211200182003720037184286187411010020010008200100082003720037111020110099100100100001000011171701600198000100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03181e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100242003715000061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001006405242219786010000102003820038200382003820038
100242003715000061196862510010101000010100005028475210200182003720085184473187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
1002420037150000212196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
1002420037150000251196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
1002420037150000187196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
100242003715000061196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
100242003715000061196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786210000102003820038200382003820038
100242003715000061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
100242003715000061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038
100242003715009061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001006402162219786010000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  movi v0.16b, 0
  bic v0.4s, #1
  movi v1.16b, 0
  bic v1.4s, #1
  movi v2.16b, 0
  bic v2.4s, #1
  movi v3.16b, 0
  bic v3.4s, #1
  movi v4.16b, 0
  bic v4.4s, #1
  movi v5.16b, 0
  bic v5.4s, #1
  movi v6.16b, 0
  bic v6.4s, #1
  movi v7.16b, 0
  bic v7.4s, #1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accdcfd2icache miss (d3)d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200881506038258010010080000100800005006400002004420063200633218010020080000200800002006320063111602011009910010016000010000010119001016842006001600001002006420064200642006420064
1602042006315003825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900916482006001600001002006420064200642006420064
1602042006315033825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900816882006001600001002006420064200642006420064
16020420063150183825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011800916892006001600001002006420064200642006420064
1602042006315063825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900416992006001600001002006420064200642006420064
1602042006315027382580100100800001008000050064000020044200632006332180100200800002008000020063200631116020110099100100160000100000101190091611102006001600001002006420064200642006420064
1602042006315003825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001002001014100916882006001600001002006420064200642006420064
1602042006315033825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900816892006001600001002006420064200642006420064
1602042006315033825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900816992006001600001002006420064200642006420064
1602042006315093825801001008000010080000500640000200442006320063321801002008000020080000200632006311160201100991001001600001000001011900916992006001600001002006420064200642006420064

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03071e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696b6d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0? int output thing (e9)eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600242008215003442780012128000012800006264000011520031020059200503218001220800002080000200502005911160021109101016000010001003484123344221123200472402160000102006020051200512006020060
1600242005915000442780012128000012800006264000011520031020050200593218001220800002080000200502005011160021109101016000010001004685122252112222200472201160000102006020051200512005120051
16002420050150050744278001212800001280000626400000152003102005020050321800122080000208000020050200501116002110910101600001000100468512234211218200472202160000102006020051200512005120051
160024200591500375442780012128000012800006264000011520031020050200593218001220800002080000200502005911160021109101016000010001004685110252112211200472201160000102005120051200512005120051
1600242005015006442780012128000012800006264000011520031020050200503218001220800002080000200502005011160021109101016000010001003485222342111022200562201160000102005120051200512005120051
1600242005015003442780012128000012800006264000011520031020059200503218001220800002080000200502005911160021109101016000010001004685122252111022200472201160000102005120051200512005120051
160024200591500944278001212800001280000626400001152003102005020050321800122080000208000020050200501116002110910101600001000100458512125211228200472201160000102005120051200512005120051
16002420050150012442780012128000012800006264000011520031020050200503218001220800002080000200502005011160021109101016000010001004885122342111022200472401160000102005120051200512005120051
16002420050150049244278001212800001280000626400001152003102005020050321800122080000208000020050201791116002110910101600001000100458511925211228200472201160000102005120051200512006020051
1600242005015010442780012128000012800006264000011520031020050200503218001220800002080000200502005011160021109101016000010001004585122252112323200472201160000102005120051200512005120051

Test 4: throughput

Count: 16

Code:

  bic v0.4s, #1
  bic v1.4s, #1
  bic v2.4s, #1
  bic v3.4s, #1
  bic v4.4s, #1
  bic v5.4s, #1
  bic v6.4s, #1
  bic v7.4s, #1
  bic v8.4s, #1
  bic v9.4s, #1
  bic v10.4s, #1
  bic v11.4s, #1
  bic v12.4s, #1
  bic v13.4s, #1
  bic v14.4s, #1
  bic v15.4s, #1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0318191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116124003501600001004003940039400884004840039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110216214003501600001004003940039400394003940039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116124003501600001004003940039400394003940039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100002010110116214003501600001004003940039400394003940039
16020440038300000051525160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116224003501600001004003940039400394003940039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116334003501600001004003940039400394003940039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116224003501600001004003940039400394003940039
1602044003830000004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110116124003501600001004003940039400394003940039
1602044003830000604025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110216114003501600001004003940039400394003940039
1602044003829900004025160100100160000100160000500112001614001940038400381997331999616010020016000020016000040038400381116020110099100100160000100000010110216214003501600001004003940039400394003940039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)030b1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9c2cdcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002440050300004525160010101600001016000050112001611040019400384003819989320011160010201600002016000040038400381116002110910101600001000000100223214172114340035208160000104003940039400394003940039
1600244003830000512516001010160000101600005011200160154001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024113251742234400354016160000104003940039400394003940039
16002440038300004525160010101600001016000050112001611540019400384003819989320011160010201600002016000040038400381116002110910101600001000000100223115172115540035208160000104003940039400394003940039
16002440038300027512516001010160000101600005011200160154001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024113231742243400354016160000104003940039400394003940039
1600244003829900512516001010160000101600005011200160154001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024113241742244400354016160000104003940039400394003940039
1600244003830000452516001010160000101600005011200161104001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024113251742255400354016160000104003940039400394003940039
1600244003830000514916001010160000101600005011200160154001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024113251742255400354016160000104003940039400394003940039
1600244003830000512516001010160000101600005011200160154001940038400381998932001116001020160000201600004003840038111600211091010160000100000010024111231742244400354016160000104003940039400394003940039
1600244003830003051251600101016000010160000501120016010400194003840038199893200111600102016000020160000400384003811160021109101016000010000001002283231742253400354016160000104003940039400394003940039
1600244003830000520251600101016000010160000501120016000400194003840038199893200111600102016000020160000400384003811160021109101016000010000001002233231742234400354016160000104003940039400394003940039