Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

CASA (64-bit)

Test 1: uops

Code:

  casa x0, x1, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 70 nops): 4.001

Issues: 3.006

Integer unit issues: 0.000

Load/store unit issues: 3.006

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03l1i tlb fill (04)l1d tlb fill (05)mmu table walk instruction (07)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f181e1f22243a3f464951schedule uop (52)schedule ldst uop (55)dispatch ldst uop (58)simd uops in schedulers (5a)5f63696a6d6emap rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst int load (95)inst ldst (9b)9dl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)cfd0d1d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
7400933098248003513100101007000551133270112128730063006300322975414929862327743293672530031002300610036012328752638217100110001000130095431011200212113011999121016057118011835338971193226883942444622676032484167511448815322300010013282432827327573328732950
740053297224700310360000100621059123307400212653006300630062299961492997132838330597253006100130061003601232893266121710011000100003003042100520040053006999161215475118622830836851170226343940444619676432482164441554415852300010013284733113334623329633333
740053302124900270280000100621058913284000209173006300330092294361492978532744329608253003100230061002601233001261021710011000100003006040100420040043010999131216073119012833137211165225364069443613637232524175901419415201300010013292732887328833296332910
7400532913245002902300001008210580332919002132630033003300622964110493006632825329177253006100330061002601232806266621710011000100003003040100520020053005999130016263113591834239311459229723673443720657332508179191541915785300010013291432912331333329632943
740053330124900210230000100600058883280000208773006300630032297851492980232859328317253006100130031002600633268264121710011000100003003042100320020053005999141215827116122813939541170227493986444413706932477177721497616123300010013296032971332973288932836
740053296424600280340000100601056503272400208563006300630062291821493021432918331187263006100230061002601232791266421710011000100003006002100620040053012999141215919117682828239911467224194005444217677132719165681423015258300010013289132908329963301532970
7400532898250002903100001005010559532767002075630033003300322943101492995732795329027263003100130061002601233025263021710011000100003006042100520000033009999131016099118740825438941670230503643443814676232682169791448716702300010013304033371332623329533324
740053285725000230280000101101058133283600208773006300330032291521492989032901331997253003100230061001601232818264321710011000100003000042100920040043009999141215939117272836939161264225163953443720676732653163291466915814300010013324932829329613286232990
7400533405246003103000001006000596932798002090030063003300622973101492977533061329976253006100230061001600633151266321710011000100003006040100620040043007999130015540112932837140001271231683951444419717032356166651546316055300010013282932824329863283333423
74004334532490033033001010040005935331130120796300630063000228123149298163290033440725300310023003100160123324826472171001100010000300004010052004004300999915121607911299283163884973229353697443717666132562168881425715185300010013286632847328593289932879

Test 2: throughput

Code:

  casa x0, x1, [x6]
  add x6, x6, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0528

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f202224293a3e3f4043464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6d6emap rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive succ (b3)atomic or exclusive fail (b4)b6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c3branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
502143054522900000000576221779810704117176304647521621322029401011010130000101003000050513264278114927416305263047832047940100202003000020200600003052220011202011009910010000101001000001003089601754118110956203462643784232133831370999821304114740169200200013101171130493100001211030000201003048730518304923047130489
502043052222800000000567317482310744116104304657981822522229401001010030000101003000050513263233024927376304773052432047440100202003000020200600003052820011202011009910010000101001000001003090001738108610959203742551686830133631345999821315118722169303300013101161130551100001111230000201003051730511305083048730532
502043059722800000010565117979910736111184304937891523721130401001010130000101003000050513263827114927385304783049032051540100202003000020200600003050120011202011009910010000101001000021003083501721112410962203482882789230145731359999822316111727135300700013101171130534100001812330000201003054530514304963054730450
50204305342290000000055181997591072899120305037771820422329401001010030000101003000050513263959004927469304843052432050840100202003000020200600003049920111202011009910010000101001000001003093201768120910968203422871485274129931357999821345116829158200400013101161130511100001913330000201003051330588305593053230517
502043043422800000000576720979210688113100304487832222324029401001010030000101003000050515264208004927402304953050832053540100202003000020200600003052720011202011009910010000101001000001003085501696108410955203562632687254144731354999822310119846161292100013101161130512100001111430000201003051330538305003053330468
5020430513229101000005717196773106961171243048881213224205294010210100300001010030000505132634860049274603049130513320484401002020030000202006000030521200112020110099100100001010010000010030904101607106210927203702831284054147231346999823344116782149891400013101161130546100001212230000201003053230521305313048330565
502043046222810000000581122677210680111963048978723232244354010110100300001010030000505172632260149273543051330454320524401002020030000202006000030518196112020110099100100001010010000010030893818441213110172033829445846381427313759998273581107911668931900013101161130474100001112130000201003048530496305563049230523
502043051622910000000565219478710720107144305157801423222230401011010130000101003000050515262916104927437304963046232053140100202003000020200600003048920011202011009910010000101001000001003092571701110810954203812871081268150231319999825338123824176090500013101161130530100001713130000201003061130522305273053230559
502043046722810010000594522779310712111136304647831525221232401011010030000101003000050515264242014927430305213051132049240100202003000020200600003051120011202011009910010000101001000001003093091659108410971203672581684226152031298999823318121793163191900013101171130543100001511230000201003051230547305133050430503
502043054222910000000563724380910704129140304667841324723431401001010330000101003000050513263244004927485305293046732047040100202003000020200600003053620011202011009910010000101001000001003088491936114210915203992783484226142531361999823324122780184070400013101171130476100001810230000201003049930497304823053630520

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0602

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss data (0b)0e0f18191e1f202224293a3e3f4043464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6d6emap rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive succ (b3)atomic or exclusive fail (b4)b6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c3cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
50034305952310000000570075755106801351403058379056227254254001010010300001001030000500632636721049274923055730582320543400102002030000200206000030644185112002110910100001001010000010308410148810221102520331264157887413773136999982235542707155206712701171130600100001010030000200103061330649306163062130625
500243060822900000005821106788106961441363056575243253267254001010010300001001030000500632631861049275013053530542320577400102002030000200206000030521185112002110910100001001010000010308560152899911034202892704183232135031319999822406556951400007127011611305721000078030000200103060630580306583061230583
500243060422900000005816887611068813321230526772502642692840010100113000010010300005006326323910492748130579305981320592400102002030000200206000030602185112002110910100001001010000010308900166510021097520285281154854601324313409998223926272414880301270117113059110000127130000200103058730478305773058330561
50024305682290000000569786761106801541483061278556261266254001010010300001001030000500632638061049274673062330651320530400102002030000200206000030640185112002110910100001001010000010308680148410171093620297273127844013033129899982439555642145403012702171130563100001411230000200103056430627305683056130579
5002430528229000010057001057771066412417630572765512562522540010100103000010010300005006326305510492755330604305833205944001020020300002002060000305441851120021109101000010010100000103086401759972110062032129220840110153331301999821364507121564030127011611305741000067030000200103057530629306213063430612
500243053623000000005811827821068014636030568799552922442540010100103000010010300005006326422410492749030572306023205844001020020300002002060000306471851120021109101000010010100002103095601664988110182030126187898541355313449998233826272114080331270117113061310000108430000200103058230564305673054630562
5002430616229000100056061017841067213388306508066024323625400101001130000100103000050063264060114927557305903060332061240010200203000020020600003060318511200211091010000100101000021030872015891030109742028729132834441270313249998223766472714200661270116123067010000107130000200103058530542305723059430606
50024306002290001000571810075910680126216306017625925023928400101001030000100103000050063263691104927520305643057332059840010200203000020020600003059918511200211091010000100101000001030875016361040110142029728157832481282313199998253824767915700301270116113058210000106030000200103062630598306213053930565
500243058022900000005773797651070413984306157945025724529400101001030000100103000050063263477104927505306233060532059740010200203000020020600003059218511200211091010000100101000001030872016741043110102029826090770321419313229998233895472614260001270116113057210000126130000200103052630555305883061630593
500243059822900000005860120796106481249630599770522352712640010100103000010010300005006326222810492748230597305733205704001020020300002002060000305731851120021109101000010010100000103083701638106410989202732585178472125731272999822388466381562004127011611305601000068030000200103060930619306423063530560

Test 3: throughput

Code:

  casa x0, x1, [x6]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 19.1397

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f18191e1f22233a3f43464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6063696a6d6emap rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e7? int output thing (e9)eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
40210191417142411010100024344000019005926634301421003004210030042500261667901491869971914111900771318137430142221021430042102146008419141213482110201100991001000010010000110030042002435920028014346443899999114348012111727774611711189913004963000010101191411190066191411190066191399
402051914061424010101000243460000190062267343014210030042100300425002616668114918831719140919141113181375301422110214300421021460084191411135721102011009910010000100100000100300422802436420028014355443929999114349012111727774611711191242000603000010101190075191400190078191422191400
4020519140714230101010002436411011913950603430142100300421003004250026168460149188329190077191409131813743014210102143004210214600841914091348211020110099100100001001000001003004228132435820028014351443859999114348112111727774711711191242009613000010101190078191412190078191410190078
402051900651434010100000243590100190057266343014210030042100300425002616794014918831919007719139913181361301421010214300421021460084191411134821102011009910010000100100000100300420132436420029414349443879999114344000111727774711711191245000603000010101190066191410190078191400190075
402051900651434010100000243511100190062260343014210030042100300425002616804014918832919006519139713181373301421010214300421021460084191409135721102011009910010000100100000100300422802436420028114353443929999114348012111727777311711189913009013000010101190075191433190071191407190075
402051900771433010100000243510000190062066343014210030042100300425002616829014918833419007719141113180041301421010214300421021460084190078136621102011009910010000100100000100300422802436220029014345443839999114348012111727773911711191241009603000010101191412190066191422190066191409
402051913991423010100000243610001191393266343014210030042100300425002598683014918715719141119007414181372301841010214300421021460084191411135721102011009910010000100100000100300420142436420028214352443979999114350012111727774211711191255009613000010101191409190078191398190066191412
4020519139714240101000002435500011900680763430142100300421003008450025988540149186985191407190065131800413014210102143004210214600841900771365211020110099100100001001000001003004227132436420028014347443929999114347012111727774911711189913109603000010101190075191410190078191400191415
4020519140814240101000002435801001913962663430142100300421003004250026168420149188329190077191406131813703014210102143004210214600841914091360211020110099100100001001000001003004228142435620028014355443929999114350010111727774311711191245000613000010101190078191412190075191422191412
4020519140914230101000002436100001900622873430142100300421003008450025988550149186997191406190077131800413014210102143004210214600841900771365211020110099100100001001000001003004228152436020028014351443839999114350002111727773811711189913009013000010101190078191412190078191408190078

1000 unrolls and 10 iterations

Result (median cycles for code): 19.0102

retire uop (01)cycle (02)03mmu table walk data (08)l2 tlb miss data (0b)0e0f18191e1f22243f43464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6063696a6d6emap rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)c2branch mispred nonspec (cb)cdcfd1d5map dispatch bubble (d6)ddfetch restart (de)e0eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
40028190088143300000024348000191389838343004910300391030039502616893014918833419008219141410180050300491110033300391003360078191426136521100211091010000101000011030039001924363200260014351443899999114348120006517742218221912170603000010011190083191417190071191416190083
400251900821434000000243480101914118083430049103003910300395026168871149188335190071191404101813843004910100333003910033600781900701373211002110910100001010000110300390281924362200260014355443929999114350120016517750218221912190663000010011190071191417190083191403190083
4002519007014340000002434901019006785103430049103003910300395025989071149188336190082191416101800503004911100333003910033600781900701361211002110910100001010000010300390282124362200260014354443879999114353120006517741218221899570063000010011191497190163191418190513191494
400251914161424010000243610001900679583430091103003910300395026168880149188334190175191494371813823004910100333003910033600781914161365211002110910100001010000110300390282124363200261014361443889999114350120006517741218221912196063000010011190340191417190083191418190083
40025190083143310013024651000190055851034300491030039103003950259874001491870021914071900821018005030049101003330039100336007819008313852110021109101000010100000103003900024364200260014348443879999114352120006947792218231898876663000010011191404191118190083191415190071
4002519007014340000002436000019139985103430049103003910300395025989080149188334190070191414101813823004900100333003910033600781900701373211002110910100001010000010300390282124364200260014355443919999114346120006517746218221898756663000010011191417190071191403190083191405
400251914141424000000243570001913878510343004910300391030039502598744014918700219140219008210180050300491010033300391003360078191415135321100211091010000101000001030039028024366200260014356443849999114352120006517747218121912726663000010011190083191417190084191495190083
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