Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

CASH

Test 1: uops

Code:

  cash w0, w1, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 70 nops): 4.001

Issues: 3.006

Integer unit issues: 0.000

Load/store unit issues: 3.006

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03l1i tlb fill (04)l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f1e1f22233a3f464951schedule uop (52)schedule ldst uop (55)dispatch ldst uop (58)simd uops in schedulers (5a)5f63696a6b6d6emap rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst int load (95)inst ldst (9b)9dl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd0d1d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
7400734123255713120110100301055573391500222123003300930092291521493102003382534173725300610033006100260063405627412171001100010000300604210012002001300699910002001509210844079833524484239203619443719556132918189441628617607300010013412934133341383409634182
7400534079256100000000100301053013393810221453006300630062291551493107603382934042725300610023006100260183413027452171001100010000300600210022004001300699910012001506110745079943495254238143523444514575133014190361640817507300010013413034147341113412934137
7400534116255401001000100301053823393810220523006300330062292111493104703376734130727300310023006100260063413227262171001100010000300304210022004001300999910010001486010547179583560266234873637443712596033086188571645517529300010013432234468341573405634178
7400534171255800000000100101052923404610220853009300630092295951493102503374534158625300610023006100260183400327042171001100010000300604210022006001300699910002001495810669079513624068238163596444016646633021190331654317482300010013417734019340683412534223
740053416325650100100010010105303340010022036300630063003229248149309670337523411372530061002300310026018342395278317100110001000030060421003200400118300699910002001514210653079673586058236573575443617656733152192851637317617300010013407834126340793399334082
7400534149255500000000100301052883395200220753003300630092290581493103203375734164725300610023009100160123395426922171001100010001300306210022004001300399910012001522910763079983619161239433845443716556133087189541650418014300010013419434275341063409834185
7400534224256601001000100301053463391000218863006300630062291461493107003383134062625300610023006100160123400927422171001100010000300604210022006004300999910000001494810549079953576066238963619443711615932996190681646717542300010013421834242340773404234128
7400534169256201001000100101051793404700221233006300630062290421493099303382534117926300310023006100260123405926662171001100010000300304210022004001300999910010001508710573080393561261238873593444313605432990189621633617746300010013404234167341183404034100
7400534153256501000001100301053623389200220683003300330062291771493101603373534185724300610023006100360123413526822171001100010000300904210022006004300699910012001497210699080403619358238883529444212606033098188691666217755300010013409734139341093411534044
7400534100255501000001100101053113394701220183003300630062282531493108103388534166825300310033006100360183399327342171001100010001300600210012004001300399910012001518110589080593540061237853603444112576033160191371638917801300010013405734056341023409034012

Test 2: throughput

Code:

  cash w0, w1, [x6]
  add x6, x6, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0067

retire uop (01)cycle (02)03mmu table walk data (08)09l2 tlb miss data (0b)0e0f1e1f2022293a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9e9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive succ (b3)atomic or exclusive fail (b4)b6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)c2c3cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
5020830068225000103413243102203005235132014996725401011010130000101003000051764140272501492715703006430067198843200494010020200300002020060000300677011202011009901001000010100100000010030039001181010320018104444753010699982347050240013102172230064100006630000201003005930068300683006830068
502043006822500000343544610003005243421189588254010310100300001010030000518081402733034926987030067300671987432004940100202003000020200600003006770112020110099010010000101001000000100300380088100802000744406853012499982165081240013092162230064100016630000201003005930059300593006830069
50204300582250000134044341000300433782025966025401001010130000101003000051738140271004492698703005930067198823200504010020200300002020060000300677011202011009901001000010100100000010030026019310091200131430045300839998215225500013092172230064100006630000201003006830068300693006830068
50204300672250000034594371015030052302161698642540103101013000010100300005180614027410149269870300643006719875320049401002020030000202006000030058701120201100990100100001010010000001003000801100100652000624303661301049998213605600013102172230064100000630000201003006830068300683006830068
50204300672250000034373521004300522422223963225401011010430105101003000051832140201800492697803006730067198833200594010020200300002020060000300677011202011009901001000010100100000010030043025801011120009450048643008399982283257240213102172230064100006630000201003006830068300683006830068
50204300582250000033744361010300523862423993325401031010030000101003000051822140271901492697803006430067198753200494010020200300002020060000300587011202011009901001000010100100000010030035025961010320008244036613009099982167271240013102172230064100006630000201003006830068300593006830068
5020430067225000003412048102030043407151998732540101101013000010100300005179714027510249269870300673006719882320049401002020030000202006000030067701120201100990100100001010010000001003004002485101082000625502668300599998244124700013102172230055100006030000201003006830069300683006930068
50204300672250000034222361030300434542323961725401021010130000101003000051795140268001492698703006730067198833200504010020200300002020060000300677011202011009901001000010100100000010030032024911009520009049050663009899982542054300013102172230064100006630000201003006830068300593006830068
50204300672250000034312301000300434061923961925401011010230000101003000051793140272402492698703005830067198823200504010020200300002020060000300677011202011009901001000010100100000010030056024111101202000515104257300729998233625200013092172230064100006630000201003006830068300693006830068
50204300672250000034523391010300433441923983725401021010030000101003000051822140269001492698703006730067198753200504010020200300002020060000300677011202011009901001000010100100000010030046024941011920023346050473009299982454260240013102172230064100036030000201003006830068300683005930068

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0080

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f2022243a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6b6d6emap stall dispatch (70)rob full (74)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9e9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive succ (b3)atomic or exclusive fail (b4)b6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c3branch cond mispred nonspec (c5)cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
500293008122522210000341413253010300652011016980025400101001030000100103000051351140340110492700003007730080198960320062400102002030000200206000030080751120021109010100001001010000101030043164199010099200142270241023006899982660138543190001270117113006110000131330000200103008130081300813008130081
50024300802252020100034371125102123006524114119939254001110010300001001030000512831403359104927000030080300641989508200634001020020300002002060000300807711200211090101000010010100000010300501543900100732002320018713007599982353105341170001270117113007710002131330000200103008230065300813008130082
50024300802252222000034321318103030065132141595682540010100103000010010300005133114033611349270000300803008019897032006240010200203000020020600003008077112002110901010000100101000000103004116418701008720011232018413006199982455117241170011270117123007710000131330000200103008130081300813008130081
50024300802251002000034151126101030065221161295672540011100103000010010300005127114035551049270000300803006419878032006340010200203000020020600003008075112002110901010000100101000000103004115416901007920011133006030083999823439624214000127011711300771000001330000200103008130081300813008130081
5002430080225110200003451152130224300652213014959825400101001130000100103000051340140325811492700003008030080198970320062400102002030000200206000030080761120021109010100001001010000001030072184883010072200092200923005699982351135941150001270116113007710000131330000200103008230065300813008130082
50024300802252000120034269331003630065243101998192540010100103000010010300005137014033771149270000300803008019895032006240010200203000020020600003008076112002110901010000100101000000103004117417701009520014329016763008699982359115641184001270117113007710001131330000200103008130081300813008130081
500243008022522220000345511280020300652211911955325400101001030000100103000051327140347810492700003008030080198940320063400102002030000200206000030081761120021109010100001001010000001030041144477010069200152260188730077999823541110241150001270117113007710002131330000200103006530081300813008130081
500243008022520020000343911261001230066162161598212540011100103000010010300005134814033911049270000300773008019896032006240010200203000020020600003008076112002110901010000100101000000103003619419001008720016135024903007999982262116841140001270216113007710004131330000200103008130081300653008130081
500243008022520220000344911312020300651732299821254001010010300001001030000513361403444104927000030077300801989603200634001020020300002002060000300807611200211090101000010010100000010300411441790100892001623602483300779998234710590141001270117113006110000131330000200103008230081300813008130066
50024300802251111000034311219201336300652831519988725400111001030000100103000051350140341710492700003007730080198960320062400102002030000200206000030080761120021109010100001001010000001030033164270110097200101350306330077999824561074411300012701161130077100000030000200103008130081300813008230081

Test 3: throughput

Code:

  cash w0, w1, [x6]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0107

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f1e1f22243a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)606367696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2st memory order violation nonspec (c4)branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd0d1d5map dispatch bubble (d6)ddfetch restart (de)e0e2e7eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
40729301162260001000127940107300951891441338836648177367181965681397683638111049270333011030101294845108304575993289745920904609242088812263430110203211020110099100100001001000001003550002814920924213450094624111399991726221200134512466440415694172030103180706630000106083010830111301023009930111
4071430101225000000013086210130083090151532773638420536545201571711012836868111492703230115300982850449982085778631077460207366110120897122742300982302110201100991001000010010000010035139028140200352117800104654106799991722021200136121365981206411030098179449030000106143010830113301083010830102
407163010122500000001327021073009810615693259365602013622320056895992832881110492701830095301103223452878685785829797160207786088821041122346300982882110201100991001000010010000010034912028155199502126400109874201099991728121200134011166420915697161530096180816630000106063012930102301153011230114
407153010722501000101301320093009619915193296368461983689219958320971831027110492704330107301102733477379885805732807266207576117320650122418301102622110201100991001000010010000010035187028148199552117800101964108799991680021200131811266451412648121230107178606630000106143011130118301083010830112
4070830112225000000112539210123008320814603208363101873640520057145982829298110492702730110301102935449481975829529817264209146156620850122148301072532110201100991001000010010000010034988001492055721196001032341394999917188212001404113659201006460030111182806630000106163011330099301083011030109
4071530111225010100013523200930095070153932453684617036392198577279428299801104927027301073024729844315841557316291472962088461695208181225923010724321102011009910010000100100000100349160014619975212500097884183699991759220200144811266541616654131530095181100630000106103010830099301113011130113
407153011022600010001274720003008325014103466366882093671320458259100682861611049270273010130101310845018016579013056713220879617612085112339030110247211020110099100100001001000001003509902815319739213340096684147299991706120200135312166740015649171430109181606030000106123010230108301143009930111
4070930115225000000013030200030092070150633983676821036437204569321069839753110492702130110301102983452180395808129526942209476232521020123882301102362110201100991001000010010000010035404028146202922130610106524131499991710601200134821266031511667111330103180606630000106143010030108300993010930111
4071530111226000000112893210630083075147034663674819736136200570389248406941104927021301133011329184437814057837304368942077961161208811221303010725121102011009910010000100100000100352060281581978421278001006041594999917460002001367214677011411643161730095178216630000106103011430102300993011130113
407243010722501000001282721003008607715663292366022013652721056814104083089411149270273009530107279544078611575463218736720897611672095512388830101258211020110099100100001001000011003534002814520305212540099084120599991711721200133911266521131571691030108179516630000106163010830108301083011530111

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0113

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f223a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)606367696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive succ (b3)atomic or exclusive fail (b4)bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2st memory order violation nonspec (c4)cfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e2e7eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
405463011022500000000214661401301048141496635773940520395282161036108795896110492705830123301191768488863886108520153921589646592171712930630123239211002110910100001010000110379122034323280132194402191314979599991135581410311071628929156191315301241926009030000105283010230112301113011130115
405423011022600000000214792003009500997235383941322393842261286957937970104927030301103011018144887637260977232588216226486921704129372301102472110021109101000010100000103783300052779721925001923449835999911351320000109662867136111413300971904366030000105273011130123301143011130111
40541301102260000000021351200300980901004350339471203933921610351007923291104927033301173011718054916632161420206548216636452121631130110301012382110021109101000010100000103794202800278772190500191524974499991135591412311086630729126301610301191932099030000105263012030120301113012030120
4054130110225000000002131921030095207103835313950221394382061336109792390110492703230101302341755484162736109022457321591648482162312928230101301211002110910100001010000010378530281602774521992001926749704999911357821200110062947116161215300961889366030000105283011130102301133011130127
4054230101225111100002157614013010881313911353139508203951322610861007939610114927039301193012017784800641161050235561216186496521615129300301382552110021109101000010100000103785522343102782021923001929349859999911349821200111862726136111111301071932466030000105283011130114301113011130114
405403011422600000000215220103009527796636313957521393352061111108794594010492703330110301101873489462436124522260421662645872159412952830114241211002110910100001010000010378020016627821219370019233495409999113556212001079631510126171214300961876366030000105283010230102301113010230102
4054230101226000000002152321030086199938354839470223944120609981097927451104927030301013010117844791641761067210543215916481821664129342301102552110021109101000010100000103779002816627938218970019286498789999113611212001118631512116201417301061930366030000105283010330102301113011130112
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