Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

CLS (vector, 2S)

Test 1: uops

Code:

  cls v0.2s, v0.2s
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)033f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10042037156116862510121000100026452112018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110001073216221786100020382038203820382038
10042037166116862510001000100026452102018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216321786100020382038203820382038
10042037156116862510001000100026452102018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216231786100020382038203820382038
10042037156116862510001000100026452112018203720371571318951000100010002037203711100110000073216221786100020382038203820382038

Test 2: Latency 1->2

Code:

  cls v0.2s, v0.2s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)0318191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150000038119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
1020420037150000073219686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
1020420037150000068819686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038
102042003715000008219686251010010010000100100005002847521200180200372003718421318745101002001000020010000200372003711102011009910010010000100000007102162219791100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420084150982196862510010101000010100005028475211200542003720037184433187671001020100002010170200852013311100211091010100001000640216221978610000102003820038200382003820038
10024200371500103196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001010640216221978610000102003820038200382003820038
10024200371500103196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
100242003715012103196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
1002420037150061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
1002420037150061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
10024200371500937196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001003640216221978610000102003820038200382003820038
1002420037150061196862510010101000010100005028475210200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
100242003715001261968625100101010000101000050284752102001820037200371845621188571031720100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038
1002420037150061196862510010101000010100005028475211200182003720037184433187671001020100002010000200372003711100211091010100001000640216221978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  cls v0.2s, v8.2s
  cls v1.2s, v8.2s
  cls v2.2s, v8.2s
  cls v3.2s, v8.2s
  cls v4.2s, v8.2s
  cls v5.2s, v8.2s
  cls v6.2s, v8.2s
  cls v7.2s, v8.2s
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030818191e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005915000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151181161220035800001002003920039200392003920039
8020420038150000007182580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151182161220035800001002003920039200392003920039
802042003815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151182162120035800001002003920039200392003920039
802042003815000000502580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151181162220035800001002003920039200392003920039
802042003815000001292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151182161220035800001002003920039200392003920039
802042008815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151182161220035800001002003920039200392003920039
802042003815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151182161220035800001002003920039200392003920039
802042003815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151181161220035800001002003920039200392003920039
802042003815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151181162220035800001002003920039200392003920039
802042003815000000292580108100800081008002050064013212001902003820038997769989801202008003220080032200382003811802011009910010080000100000011151181161220035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03071e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9faccfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242005114900392580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100502016161762003580000102003920039200392003920039
8002420038150003949800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001005020151617172003580000102003920039200392003920039
80024200381500039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010050206161762003580000102003920039200392003920039
80024200381500039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010050208168172003580000102003920039200392003920039
800242003815000392580010108000010800005064000002001920038200389996310018800102080000208009820038200381180021109101080000100502017166172003580000102003920039200392003920039
80024200381500039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010050208168172003580000102003920039200392003920039
8002420038150012392580010108000010800005064153202001920038200389996310018800102080000208000020038200381180021109101080000100502017161772003580000102003920039200392003920039
800242003815000392580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100502017166172003580000102003920039200392003920039
80024200381500039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010050206166172003580000102003920039200392003920039
80024200381500039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010050208161782003580000102003920039200392003920039