Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

CLS (vector, 4H)

Test 1: uops

Code:

  cls v0.4h, v0.4h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371506116862510001000100026452112018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371506116862510001000100026452102018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371606116862510001000100026452102018203720371571318951000100010002037203711100110000373116111786100020382038203820382038
100420371506116862510001000100026452112018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371506116862510001000100026452102018203720371571318951000100010002037203711100110000073116111786100020382038203820852038
100420371508216862510001000100026452102018203720371571318951000100010002037203711100110001073116111786100020382038203820382038
100420371506116862510001000100026452112018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371506116862510001000100026452112018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371508216862510001000100026452112018203720371571318951000100010002037203711100110001073116111786100020382038203820382038
100420371506116862510001000100026452112018203720371571318951000100010002037203711100110000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  cls v0.4h, v0.4h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003714906119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000124100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715096119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
1020420037150014719686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100204200571021611197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500611968625100101010000101000050284752112001802003720037184433187671001020100002010000200372003711100211091010100001007506403163319786010000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001802003720037184433187671001020100002010000200372003711100211091010100001002406403163319786010000102003820038200382003820038
10024200371500631196862510010101000010100005028475211200180200372003718443318767100102010000201000020037200371110021109101010000100006403163319786010000102003820038200382003820038
1002420037150661196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100006403163319786010000102008620038200382003820038
10024200371500611966445100101010000101000050284752102001802003720037184433187671001020100002010000200372003711100211091010100001030306403163219786010000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001802003720037184433187671001020100002010000200372003711100211091010100001030006403163319786010000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001802003720037184433187671001020100002010000200372003711100211091010100001024006403163319786010000102003820038200382003820038
1002420037150061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100026403163319786010000102003820038200382003820038
100242003715002053196532510010101000010100005028475211200180200372003718443318767100102010000201000020037200371110021109101010000100306403163319786010000102003820038200382003820038
1002420037150061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100906403163319786010000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  cls v0.4h, v8.4h
  cls v1.4h, v8.4h
  cls v2.4h, v8.4h
  cls v3.4h, v8.4h
  cls v4.4h, v8.4h
  cls v5.4h, v8.4h
  cls v6.4h, v8.4h
  cls v7.4h, v8.4h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000010311151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000230311151180160020035800001002003920039200392003920039
802042003815000020029258010810080008100800205006401321200192003820038997769989801202008003220080032200382003811802011009910010080000100000012011151180160020035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000010311151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000002411151180160020035800001002003920039200392003920144
802042003815000000071258010810080008100800205006401321200192003820038997769989801202008003220080032200382003811802011009910010080000100001047711151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000021511151180490020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132120019200382003899776998980120200800322008003220038200381180201100991001008000010020001811151540160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132120019200912003899776998980120200800322008003220038200381180201100991001008000010000001511151180160020035800001002003920039200392003920039
802042003815000000013625801081008000810080020500640132120019200382003899776998980120200800322008003220038200381180201100991001008000010000001211151180160020035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80024200391500000150392580010108000010800005064000001200192003820038999631001880010208000020800002003820038118002110910108000010200130050205165520035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000120019200382003899963100188001020800002080000200382003811800211091010800001000010050204165420035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000120019200382003899963100188001020800002080000200382003811800211091010800001000000050204164520035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000010050204164420035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000020050204164320035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000003050204162320035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000010050203163320035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000000050204164320035080000102003920039200392003920039
8002420038150000000514258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000030050204164320035080000102003920039200392003920039
800242003815000000039258001010800001080000506400000020019200382003899963100188001020800002080000200382003811800211091010800001000000050203163420035080000102003920039200392003920039