Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

CLS (vector, 4S)

Test 1: uops

Code:

  cls v0.4s, v0.4s
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10042037160841686251000100010002645212018203720371571318951000100010002037203711100110000073316221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150711686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
100420371501031686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
100420371501381686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073216221786100020382038203820382038

Test 2: Latency 1->2

Code:

  cls v0.4s, v0.4s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)0308091e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150006906119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715011006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
1020420037150000034619686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005712847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100000071011611197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100100071011613197910100001002003820038200382003820038
102042003715000006119686251010010010000100100005002847521120018200372003718421318745101002001000020010000200372003711102011009910010010000100003271011612197910100001002008620086201332003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9faccfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420037150396119686251001010100001010000502847521120018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102008520038200852003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715036119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201050520037200371110021109101010000100640216221978610000102003820038200382003820038
1002420037150306119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221979710000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038
100242003715006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100640216221978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  cls v0.4s, v8.4s
  cls v1.4s, v8.4s
  cls v2.4s, v8.4s
  cls v3.4s, v8.4s
  cls v4.4s, v8.4s
  cls v5.4s, v8.4s
  cls v6.4s, v8.4s
  cls v7.4s, v8.4s
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030818191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200481500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000005025801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
802042003815000024002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
802042003815000000050425801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100000000011151180160020035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080a0b181e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9facc5cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80024200501500000039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010005020516422003580000102003920039200392003920039
80024200381500000939258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020216242003580000102003920039200392003920039
80024200381500000039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010005020216242003580000102003920039200392003920039
80024200381500000639258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020216422003580000102003920039200392003920039
80024200381500000039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010005020416422003580000102003920039200392003920039
80024200381500000639258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020416242003580000102003920039200392003920039
80024200381500000039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020416642003580000102003920039200392003920039
800242003815000002181258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020216242003580000102003920039200392003920039
80024200381500000039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020416242003580000102003920039200392003920039
80024200381500000039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010005020216242003580000102003920039200392003920039