Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

CLS (vector, 8H)

Test 1: uops

Code:

  cls v0.8h, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004203716061168625100010001000264521201820372037157131895100010001000203720371110011000073216111786100020382038203820382038
1004203715061168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
10042037150244168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
10042037150370168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
1004203715061168625100010001000264521201820372037157131895100010001000203720371110011000173116111786100020382038203820382038
1004203715061168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
10042037152761168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
1004203715061168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
1004203715061168625100010001000264521201820372037157131895100010001000203720371110011000073116111786100020382038203820382038
1004203715061168625100010001000265785201820372037157131895100010001000203720371110011000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  cls v0.8h, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715015061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
102042003715000501196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
10204200371490061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038
102042003715000611968625101001001000010010000500284752112001820037200371842131874510100200100002001000020037200371110201100991001001000010001967101161119791100001002003820038200382003820038
10204200371500061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000007101161119791100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030818191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500001850919686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
100242003715000006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
100242003715000006119686251001010100001010000502847521020018200372003718443318767100102010180201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
1002420037155000053519686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
1002420037150000014519686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
1002420037150000012419686251001010100001010000502847521120018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
1002420037150000088419686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
1002420037150000018719686251001010100001010000502847521120018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
100242003715000008419686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038
100242003715000008419686251001010100001010000502847521020018200372003718443318767101612010000201000020037200371110021109101010000100064021622197860010000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  cls v0.8h, v8.8h
  cls v1.8h, v8.8h
  cls v2.8h, v8.8h
  cls v3.8h, v8.8h
  cls v4.8h, v8.8h
  cls v5.8h, v8.8h
  cls v6.8h, v8.8h
  cls v7.8h, v8.8h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6dde0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200571502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100101115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039
8020420038150136425801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100113931115118138020035800001002003920039200392003920039
80204200381507125801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100231115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100131115118116020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039
80204200381502925801081008000810080020500640132200192003820038997769989801202008003220080032200382003811802011009910010080000100001115118016020035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfitlb miss (d4)d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242005115001042580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200516532003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200516552003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200316532003580000102003920039200392003920039
800242003815007042580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200516352003580000102003920039200392008720039
800242003815001712580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200316352003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200416542003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200516532003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200316532003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200316532003580000102003920039200392003920039
80024200381500392580010108000010800005064000020019020038200389996310018800102080000208000020038200381180021109101080000100050200516552003580000102003920039200392003920039