Firestorm: DMB (NSH) measurements

Code:

  dmb nsh

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 1.000

SIMD/FP unit issues: 0.000

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	1e	3f	51	schedule uop (52)	schedule ldst uop (55)	dispatch ldst uop (58)	simd uops in schedulers (5a)	60	69	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map ldst uop (7d)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst barrier (9c)	st unit uop (a7)	l1d cache writeback (a8)	ac	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	f5	f6	f7	f8	fd
1004	3035	22	0	3012	2001	1000	1000	1000	6000	0	42	3035	3026	3	2893	1000	1000	3035	3026	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3027	3036	3028	3036	3028
1004	3027	22	0	3020	2009	1000	1000	1000	6000	0	42	3035	3025	3	2885	1000	1000	3026	3035	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3027	3036	3028	3036	3027
1004	3026	22	0	3012	2001	1000	1000	1000	6536	0	33	3026	3035	3	2893	1000	1000	3035	3026	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3027	3036	3027	3036	3028
1004	3027	23	0	3020	2009	1000	1000	1000	6000	0	42	3027	3035	3	2885	1000	1000	3027	3035	1	1	1001	1000	1000	1	0	73	1	16	1	1	3024	1000	3036	3027	3036	3026	3027
1004	3026	23	0	3012	2001	1000	1000	1000	6000	0	34	3025	3035	3	2893	1000	1000	3035	3027	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3028	3036	3027	3036	3028
1004	3027	23	0	3020	2009	1000	1000	1000	6000	0	42	3035	3027	3	2893	1000	1000	3035	3026	1	1	1001	1000	1000	0	0	73	1	16	1	1	3022	1000	3036	3028	3036	3028	3036
1004	3035	22	0	3020	2009	1000	1000	1000	6000	0	42	3035	3027	3	2885	1000	1000	3035	3026	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3027	3036	3027	3036	3027
1004	3026	22	0	3020	2009	1000	1000	1000	6000	0	42	3035	3027	3	2893	1000	1000	3035	3027	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3027	3036	3028	3036	3028
1004	3027	23	0	3011	2000	1000	1000	1000	6000	0	34	3026	3035	3	2885	1000	1000	3027	3035	1	1	1001	1000	1000	0	0	73	1	16	1	1	3024	1000	3036	3027	3036	3027	3036
1004	3035	23	0	3012	2001	1000	1000	1000	6000	0	32	3026	3035	3	2885	1000	1000	3025	3035	1	1	1001	1000	1000	0	0	73	1	16	1	1	3032	1000	3028	3036	3028	3036	3027

Code:

  dmb nsh

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.9043

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	1e	3f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6a	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst barrier (9c)	9f	l1d tlb access (a0)	st unit uop (a7)	ac	c2	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
10204	29094	218	21	29028	18908	10100	100	10000	100	10000	500	59800	1	49	26055	29042	29135	3	27843	10100	200	10000	200	29135	23208	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29031	10000	100	29136	29044	29136	29035	29136
10204	29135	217	315	29120	19008	10100	100	10000	100	10000	500	59800	1	49	25956	29135	29042	3	27735	10100	200	10000	200	29028	23295	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29132	10000	100	29028	29136	29037	29136	29026
10204	29025	218	357	29020	18916	10100	100	10000	100	10000	500	59800	1	49	26055	29027	29135	3	27843	10100	200	10000	200	29135	23215	1	1	10201	100	99	100	100	10000	100	0	10000	0	2	710	1	16	1	1	29132	10000	100	29037	29136	29136	29044	29136
10204	29135	217	21	29029	18899	10100	100	10000	100	10000	500	59800	1	49	26055	29043	29135	3	27843	10100	200	10000	200	29135	23221	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29132	10000	100	29036	29136	29029	29136	29036
10204	29035	218	12	29120	19008	10100	100	10000	100	10000	500	59800	0	49	25955	29135	29028	3	27843	10100	200	10000	200	29135	23221	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29132	10000	100	29036	29136	29045	29136	29035
10204	29034	218	72	29019	18917	10100	100	10000	100	10000	500	59800	0	49	26055	29043	29135	3	27843	10100	200	10000	200	29035	23295	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29132	10000	100	29036	29136	29028	29136	29035
10204	29034	218	6	29120	19008	10100	100	10000	100	10000	500	59800	0	49	25947	29135	29036	3	27843	10100	200	10000	200	29135	23214	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29032	10000	100	29136	29044	29136	29036	29136
10204	29135	218	288	29010	18916	10100	100	10000	100	10000	500	59800	1	49	26055	29034	29135	3	27843	10100	200	10000	200	29135	23207	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29040	10000	100	29136	29028	29136	29037	29136
10204	29027	218	24	29020	18917	10100	100	10000	100	10000	500	59800	1	49	26055	29025	29135	3	27752	10100	200	10000	200	29042	23295	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	2	16	1	1	29032	10000	100	29136	29037	29136	29043	29136
10204	29135	218	0	29120	19008	10100	100	10000	100	10000	500	59800	1	49	25963	29135	29035	3	27843	10100	200	10000	200	29135	23221	1	1	10201	100	99	100	100	10000	100	0	10000	0	0	710	1	16	1	1	29040	10000	100	29136	29028	29136	29037	29136

1000 unrolls and 10 iterations

Result (median cycles for code): 2.9867

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	18	19	1e	1f	3f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	61	69	6a	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst barrier (9c)	9f	st unit uop (a7)	l1d cache writeback (a8)	ac	cf	d0	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
10024	29889	224	0	0	9	0	29851	19915	10010	10	10000	10	10000	50	59982	0	1	49	26786	29866	29867	3	28681	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	2	16	3	3	29863	10000	10	29868	29867	29868	29868	29867
10024	29866	223	0	0	27	0	29936	19915	10010	10	10000	10	10000	50	59982	1	0	49	26871	29867	29864	3	28596	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	2	16	2	2	29948	10000	10	29868	29866	29866	29868	29866
10024	29867	224	0	0	6	0	29936	19915	10010	10	10000	10	10000	50	59982	0	1	49	26871	29951	29951	3	28681	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	3	16	3	3	29863	10000	10	29866	29868	29866	29866	29868
10024	29866	224	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	1	0	49	26871	29866	29866	3	28594	10010	20	10000	20	29865	29865	1	1	10021	10	9	10	10	10000	10	10000	0	3	640	0	2	16	2	3	29948	10000	10	29867	29868	29867	29867	29866
10024	29866	223	0	0	15	0	29851	19831	10010	10	10000	10	10000	50	59984	1	0	49	26784	29951	29951	3	28681	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	3	16	3	2	29948	10000	10	29867	29868	29867	29867	29868
10024	29865	223	0	0	39	0	29936	19915	10010	10	10000	10	10000	50	59982	1	0	49	26871	29951	29951	3	28681	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	2	16	2	2	29948	10000	10	29952	29952	29952	29952	29952
10024	29951	224	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	1	0	49	26871	29867	29866	3	28596	10010	20	10000	20	29866	29867	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	0	3	16	2	2	29948	10000	10	29952	29952	29952	29952	29867
10024	29866	224	0	0	0	0	29849	19830	10010	10	10000	10	10000	50	59982	0	1	49	26787	29865	29867	3	28597	10010	20	10000	20	29866	29866	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	3	16	2	2	29948	10000	10	29952	29952	29952	29952	29952
10024	29951	224	0	0	0	0	29850	19831	10010	10	10000	10	10000	50	59982	0	1	49	26787	29951	29951	3	28681	10010	20	10000	20	29951	29951	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	2	16	2	2	29863	10000	10	29868	29866	29866	29868	29866
10024	29867	223	0	0	27	0	29852	19830	10010	10	10000	10	10000	50	59982	0	1	49	26786	29951	29951	3	28681	10010	20	10000	20	29867	29866	1	1	10021	10	9	10	10	10000	10	10000	0	0	640	1	2	16	2	2	29864	10000	10	29868	29868	29867	29868	29868

DMB (NSH)

Test 1: uops

1000 unrolls and 1 iteration

Test 2: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations