Firestorm: DMB (SY) measurements

Code:

  dmb sy

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 1.000

SIMD/FP unit issues: 0.000

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	1e	3f	51	schedule uop (52)	schedule ldst uop (55)	dispatch ldst uop (58)	simd uops in schedulers (5a)	60	69	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map ldst uop (7d)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst barrier (9c)	st unit uop (a7)	ac	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	f5	f6	f7	f8	fd
1004	3027	22	42	3012	2009	1000	1000	1000	6000	0	33	3027	3035	3	2885	1000	1000	3026	3035	1	1	1001	1000	1000	0	73	4	16	2	2	3024	1000	3028	3036	3028	3036	3027
1004	3026	22	0	3012	2001	1000	1000	1000	6000	0	42	3035	3025	3	2893	1000	1000	3035	3027	1	1	1001	1000	1000	0	73	2	16	2	2	3032	1000	3027	3036	3028	3036	3027
1004	3026	23	0	3012	2000	1000	1000	1000	6000	1	42	3035	3027	3	2884	1000	1000	3027	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3023	1000	3036	3027	3036	3028	3036
1004	3035	23	0	3011	2000	1000	1000	1000	6000	0	42	3035	3035	3	2893	1000	1000	3025	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3024	1000	3036	3028	3036	3027	3036
1004	3035	22	3	3012	2001	1000	1000	1000	6000	1	42	3035	3027	3	2884	1000	1000	3027	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3032	1000	3028	3036	3028	3036	3027
1004	3027	23	3	3020	2009	1000	1000	1000	6000	1	33	3026	3035	3	2893	1000	1000	3026	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3032	1000	3027	3036	3026	3036	3028
1004	3035	23	0	3020	2009	1000	1000	1000	6000	0	42	3035	3027	3	2884	1000	1000	3027	3035	1	1	1001	1000	1000	24	73	2	16	2	2	3024	1000	3036	3028	3036	3027	3036
1004	3035	22	0	3011	2009	1000	1000	1000	6000	1	33	3027	3035	3	2893	1000	1000	3035	3027	1	1	1001	1000	1000	0	73	2	16	2	2	3024	1000	3036	3028	3036	3027	3036
1004	3035	22	18	3011	2001	1000	1000	1000	6000	1	34	3027	3035	3	2893	1000	1000	3035	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3032	1000	3036	3026	3036	3027	3036
1004	3035	22	0	3011	2000	1000	1000	1000	6000	1	42	3035	3026	3	2885	1000	1000	3026	3035	1	1	1001	1000	1000	0	73	2	16	2	2	3023	1000	3036	3027	3036	3028	3036

Code:

  dmb sy

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.9135

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	18	19	1e	3f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6a	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst barrier (9c)	9f	st unit uop (a7)	l1d cache writeback (a8)	ac	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
10204	29135	217	0	0	0	29020	18906	10100	100	10000	100	10000	500	59800	0	49	25963	29135	29034	3	27843	10100	200	10000	200	29036	23295	1	1	10201	100	99	100	100	10000	100	10000	49	3	710	1	16	1	1	29132	10000	100	29028	29136	29037	29136	29035
10204	29135	218	0	0	0	29019	18899	10100	100	10000	100	10000	500	59800	0	49	26055	29135	29135	3	27843	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	171	710	1	16	1	1	29132	10000	100	29028	29136	29035	29136	29136
10204	29028	218	0	0	0	29120	19008	10100	100	10000	100	10000	500	59800	0	49	26055	29034	29135	3	27743	10100	200	10000	200	29044	23295	1	1	10201	100	99	100	100	10000	100	10000	0	87	710	1	16	1	1	29132	10000	100	29044	29136	29037	29136	29044
10204	29135	218	0	0	0	29120	19008	10100	100	10000	100	10000	500	59800	0	49	25948	29135	29043	3	27735	10100	200	10000	200	29043	23295	1	1	10201	100	99	100	100	10000	100	10000	0	102	710	1	16	1	1	29032	10000	100	29136	29036	29136	29044	29036
10204	29135	218	0	0	0	29029	18917	10100	100	10000	100	10000	500	59800	0	49	25963	29135	29027	3	27751	10100	200	10000	200	29036	23295	1	1	10201	100	99	100	100	10000	100	10000	0	9	710	1	16	1	1	29022	10000	100	29037	29136	29136	29136	29136
10204	29043	218	0	0	0	29020	18900	10100	100	10000	100	10000	500	59800	0	49	26055	29135	29135	3	27843	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	0	710	1	16	1	1	29040	10000	100	29035	29036	29036	29035	29044
10204	29135	218	0	0	0	29120	19008	10100	100	10000	100	10000	500	59800	1	49	26055	29135	29135	3	27843	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	216	710	1	16	1	1	29040	10000	100	29036	29036	29035	29036	29036
10204	29135	218	0	0	0	29120	19008	10100	100	10000	100	10000	500	59800	0	49	25945	29035	29035	3	27743	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	174	710	1	16	1	1	29040	10000	100	29136	29136	29136	29136	29136
10204	29043	218	0	0	0	29021	18900	10100	100	10000	100	10000	500	59800	1	49	26055	29135	29135	3	27843	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	174	710	1	16	1	1	29132	10000	100	29136	29136	29136	29136	29136
10204	29034	217	0	0	0	29019	18917	10100	100	10000	100	10000	500	59800	0	49	26055	29135	29135	3	27843	10100	200	10000	200	29135	23295	1	1	10201	100	99	100	100	10000	100	10000	0	9	710	1	16	1	1	29033	10000	100	29044	29043	29045	29044	29136

1000 unrolls and 10 iterations

Result (median cycles for code): 2.9951

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	mmu table walk data (08)	l2 tlb miss data (0b)	18	19	1e	1f	3a	3f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6a	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst barrier (9c)	9f	l1d tlb access (a0)	l1d tlb miss (a1)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	c2	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? int output thing (e9)	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
10024	29951	223	0	0	0	0	9	0	0	29852	19831	10010	10	10000	10	10000	50	59982	0	49	26787	29951	29866	3	28681	10010	20	10000	20	29951	29866	1	1	10021	10	9	10	10	10000	10	0	0	10000	5	0	24	0	640	2	16	3	3	29948	0	10000	10	29867	29952	29868	29952	29868
10024	29867	224	0	0	0	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	0	49	26871	29866	29866	3	28597	10010	20	10000	20	29866	29951	1	1	10021	10	9	10	10	10000	10	0	0	10000	5	0	3	0	640	2	16	3	3	29948	0	10000	10	29867	29952	29866	29952	29952
10024	29951	224	0	0	0	0	0	0	0	29852	19915	10010	10	10000	10	10000	50	59982	0	49	26871	29866	29951	3	28681	10010	20	10000	20	29951	29867	1	1	10021	10	9	10	10	10000	10	0	0	10000	2	0	3	0	651	2	24	2	2	29948	0	10000	10	29868	29952	30038	29952	30050
10024	29866	225	0	0	0	0	3	0	0	29936	19831	10010	10	10032	12	10000	50	59982	0	49	26786	29951	29866	6	28597	10020	20	10000	20	29866	29951	1	1	10021	10	9	10	10	10000	10	0	0	10000	0	0	93	0	640	2	16	2	2	29863	0	10000	10	29865	29952	29867	29952	29952
10024	29951	224	0	0	0	0	0	0	0	30064	19830	10010	10	10000	10	10000	50	59982	0	49	26786	29951	29865	3	28597	10028	20	10000	20	29864	29951	1	1	10021	10	9	10	10	10000	10	2	2	10000	0	0	105	0	640	3	16	2	2	29948	1	10000	10	29868	29952	29866	29952	29952
10024	29977	224	0	0	0	0	0	0	0	29851	19915	10010	10	10000	10	10000	50	59982	0	49	26871	29867	29951	3	28681	10010	20	10000	20	29951	29867	1	1	10021	10	9	10	10	10000	10	0	0	10000	1	0	3	0	640	3	16	3	3	29948	0	10000	10	29868	29952	29866	29952	29868
10024	29867	224	0	0	0	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	0	49	26786	29951	29866	3	28597	10010	20	10000	20	29951	29865	1	1	10021	10	9	10	10	10000	10	0	0	10000	28	0	6	0	640	2	16	2	2	29863	0	10000	10	29867	29952	29868	29952	29952
10024	29951	223	0	0	0	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	0	49	26871	29866	29951	3	28681	10010	20	10000	20	29951	29865	1	1	10021	10	9	10	10	10000	10	0	0	10000	29	0	3	0	640	3	16	3	3	29948	0	10000	10	29866	29952	29865	29952	29952
10024	29951	223	0	0	0	0	0	0	0	29852	19831	10010	10	10000	10	10000	50	60045	0	49	26871	29866	29951	3	28681	10010	20	10000	20	29951	29866	1	1	10021	10	9	10	10	10000	10	0	0	10000	0	0	93	0	640	3	16	3	3	29861	0	10000	10	29952	29868	29952	29867	29952
10024	29951	224	0	0	0	0	0	0	0	29936	19915	10010	10	10000	10	10000	50	59982	0	49	26871	29865	29951	3	28681	10010	20	10000	20	29866	29951	1	1	10021	10	9	10	10	10000	10	0	0	10000	2	0	9	0	640	2	16	2	2	29948	0	10000	10	29868	29952	29866	29952	29952

DMB (SY)

Test 1: uops

1000 unrolls and 1 iteration

Test 2: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations