Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FCVTAU (scalar, H to X)

Test 1: uops

Code:

  fcvtau x0, h0
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 2.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 2.000

retire (01)cycle (02)0307080a18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op ld/st (7d)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst integer (97)a0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
200454141010015014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000052254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000052254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101009014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542
20045414101000014925300010002000200018000152254154124832742000020002000541541111001100000000007441644538100010001000542542542542542

Test 2: Latency 1->2 roundtrip

Code:

  fcvtau x0, h0
  fmov d0, x0
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)03080b18191e1f3a3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
302041300389740000000130023119417254010010100200001000010020000100005006214979148010341130013013003813003812548371262423010020010002200062001000220006130038130038112020110099100101001000010000100000000111131701161112953310000100001000010100130039130039130039130039130039
3020413003897401001200130042119417254010010100200001000010020000100005006214979148010340130013013037513003812548371262413010020010002200062001000220492130039130038112020110099100101001000010000100000000111131701161112953410008100001000010100130039130039130039130039130379
302041300389740000000130028119417254010010100200001000010020000100005006214979148010341130013013003813003812548361262423010020010002200062001000220006130038130038112020110099100101001000010000100001000111131801161112953410000100001000010100130039130039130039130039130039
302041300389740000000130023119418254010010100200001000010020000100005006214979148010341130013013003813003812548371262413010020010002200062001000220006130038130038112020110099100101001000010000100000000111131702161112954010000100001000010100130039130039130039130039130039
302041300389740000000130045119417254010010100200001000010020000100005006214979148010340130013013003813003912548471262413010020010002200062001000220006130038130038112020110099100101001000010000100000200111131801161112953610000100001000010100130363130039130039130039130039
302041300389730000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812548371262423010020010002200062001000220006130038130038112020110099100101001000010000100000000111131701161112953610000100001000010100130040130039130039130039130039
302041300389730000000130049119417254014110100200001000010020000100005006214979148010340130013013003813003812548361262423010020010002200062001000220006130038130038112020110099100101001000010000100000000111131701162112953410006100001000010100130039130039130039130039130039
302041300389740000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812548371262413026520010002200062001000220006130040130368112020110099100101001000010000100000000111131801161112953410000100001000010100130039130039130039130039130039
302041300389740000000130062119417254010010100200001000010020000100005006214979148010340130013013003813003812548371262423010020010002200062061000220006130038130038112020110099100101001000010000100000000111131701161112953310000100001000010100130042130039130040130039130039
302041300389740000000130031119417254010010100200001000010020000100006286214979148010341130013013003813003812563071264473010020010002200062001000220006130038130038112020110099100101001000010000100000000111131701161112953310000100001000010100130045130376130039130039130042

1000 unrolls and 10 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)03080b18191e1f3a3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5branch mispredict (cb)cfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)ecld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
300241300389740000000130023119417254001010010200001000010200001000050621497914800025113001301300381300381254983126270300102010000200002010000200001300381300381120021109101001010000101000000001270011612129525100000100001000010010130039130039130039130039130039
300241301269740000000130023119463254001010010200001000010200001000050621497914800025013001301300421300381255053126268300102010000200002010000200001300381300381120021109101001010000101000000001270011611129525100000100001000010010130039130039130039130039130039
30024130038974000024011330261201726484017710049200821005112231401112760627873914938877013001301300381300431254983126268300102010000200002010000200001300441300381120021109101001010000101000020001270011611129837100010100001000010010130532130039130365132383130375
3002413047397422221035880130023119417254001010010200001000010200001000050621497914800025013001401300381300411254983126268300102010000200002010000200001300381300381120021109101001010000101000020001270011621129525100000100001000010010130039130040130039130039130039
3002413003810080000900130024119475254001010010200001000010200001000050621798114800025013001301300411300391255413126268306732010000200002010000200001300381300381120021109101001010000101000000001270011621129525100000100001000010010130039130039130039130039130039
300241300389740000000130023119415254001010010200001000010200001000050621497914800025013001301300381300381254983126268301772010000200002010000200001300381300801120021109101001010000101000000001270021611129525100000100001000010010130039130039130039130039130050
300241300389740000000130023119417254001010010200001000010200001000050621497914800025113001301300381300381254983126268300102010000200002010000200001300381300381120021109101001010000101000000001270011611129525100000100001000010010130075130074130039130039130039
300241300389740000000130023119417254001010010200001000010200001000050621497914800025013001301300381300381254983126268300102010000200002010000200001300381300381120021109101001010000101000000011270011611129525100000100001000010010130039130039130039130075130042
300241300389740000000130023119417404001010010200001000010200001000050621497914800025013001301300381300381254983126268300102010000200002010000200001300381300381120021109101001010000101000000001270011611129525100000100001000010010130039130039130039130039130039
300241300389740000000130023119417254001010010200001000010200001000050621497914800025013001301300381300381254983126268306772010000200002010000200001302711301201120021109101001010000101000000001270011611129525100000100001000010010130039130039130039130039130039

Test 3: throughput

Count: 8

Code:

  fcvtau x0, h8
  fcvtau x1, h8
  fcvtau x2, h8
  fcvtau x3, h8
  fcvtau x4, h8
  fcvtau x5, h8
  fcvtau x6, h8
  fcvtau x7, h8
  mov x8, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)030818191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa1a8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602044007530000000317252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511711600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400412990000032252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401321400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413000003960160252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413100000032252401048010016000410016002050014401321400224004140041199776199921601202001600322001600324004140041118020110099100801001000200111511701600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401321400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042
160204400413000000032252401048010016000410016002050014401320400224004140041199776199921601202001600322001600324004140041118020110099100801001000000111511701600400388000080000801004004240042400424004240042

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)0308181e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa8a9acbranch mispredict (cb)cdcfd5d6dbddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244005529900042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010520300502015160125400388000080000800104004240042400424004240042
1600244004130000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010600000502014160137400388000080000800104004240042400424004240042
160024400413000004225240010800101600001016000050144000004002240041400411999632002116001020160000201600004004140041118002110910800101000900502016160516400388000080000800104004240042400424004240042
1600244004130000042252400108001016000010160814501440000040022400414004119996182002116001020160000201600004004140041118002110910800101004150050207160516400388000080000800104004240042400424004240042
1600244004130000023225240010800101600001016000050144000004002240041400411999632002116001020160000201600004004140041118002110910800101000120005020161601616400388000080000800104004240042400424004240042
1600244004130000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010001320050206160713400388000080000800104004240042400424004240042
1600244004130000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010101290050207160516400388000080000800104004240042401204004240120
16002440041316010422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010101013200502016160165400388000080000800104004240042400424004240042
16002440041300000842524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010101012600502013160516400388000080000800104004240042400424004240042
16002440041300000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100015300502016160167400388000080000800104004240042400424004240042