Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FCVTL2 (vector, 4S)

Test 1: uops

Code:

  fcvtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303724120612547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372400612547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372400612547251000100010003981601301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
1004303724120822547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372300612547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372490612547251000100010003981601301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372400612547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
1004303724120612547251000100010003981600301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372300612547251000100010003981601301830373037241432895100010001000303730371110011000073116112629100030383038303830383038
100430372400612547251000100010003981601301830373037241432895100010001000303730371110011000073116112629100030383038303830383038

Test 2: Latency 1->2

Code:

  fcvtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acafcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003723300000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296330100001003003830038300383003830038
102043003723200000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296670100001003008730038300383003830038
102043003723200000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296330100001003003830038300713003830038
102043003723300000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001004200209071011611296330100001003003830038300383003830038
1020430037233011014488240295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296330100001003003830038300383003830038
102043003723300000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000300071011611296330100001003003830038300383003830038
102043003723200000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296330100001003003830038300383003830038
102043003723300000061295472510100100100001001000050042771601300183003730037282643287451010020010000200100003003730037111020110099100100100001000000000071011611296330100001003003830038300383003830038
1020430037233000000103295472510100100100001251000050042771601300183003730037282643287451010020010172200100003003730037111020110099100100100001000000000071015011296330100001003003830038300383003830038
102043003723200001205782954725101001001000010010000500427716013001830037300372826432874510254200100002041000030037300373110201100991001001000010002400030710116232966914100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b18191e1f3f4e5051inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430132233000660103295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640424342970110000103003830038300383003830038
10024300372320003061295470251001010100001010000504277160130018300373008428286328767100102010000201000030037301311110021109101010000100000640416342962910000103003830038300383003830038
10024300372320000061295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640416342962910000103003830038300383003830038
100243003723200000612954755251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640416442962910000103003830038300383003830038
10024300372330000061295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640416432962910000103003830038300383003830038
10024300372330000061295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640316442962910000103003830038300383003830038
10024300372320000061295380251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640416432962910000103003830038300383003830038
10024300372330000082295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640416442962910000103003830038300383003830038
10024300372330000061295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100000640316342962910000103003830038300813008530038
100243003723300018061295470251001010100001010000504277160130018300373003728286328767100102010000201000030037300371110021109101010000100300640416342962910000103003830038300383003830038

Test 3: throughput

Count: 8

Code:

  fcvtl2 v0.4s, v8.8h
  fcvtl2 v1.4s, v8.8h
  fcvtl2 v2.4s, v8.8h
  fcvtl2 v3.4s, v8.8h
  fcvtl2 v4.4s, v8.8h
  fcvtl2 v5.4s, v8.8h
  fcvtl2 v6.4s, v8.8h
  fcvtl2 v7.4s, v8.8h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03040818191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042009515500000025125801081008000810180130500643432020297204572045810044381012180836202807662008066820357204597180201100991001008000010040230654111524713941716203671800001002036520410204072041320355
802042035216401679247042256825801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512231688200360800001002004020040200402004020040
802042003915500000025925801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512281638200360800001002004020040200402004020040
8020420039155000012023125801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512291688200360800001002004020040200402004020040
802042003915600000025625801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512281688200360800001002004020040200402004020040
802042003916100000023525801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512291698200360800001002004020040200402004020040
802042003915600000023525801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512231689200360800001002004020040200402004020040
8020420039155000000222525801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010001000111512291699200360800001002004020040200402004020040
802042003915500000023525801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512291699200360800001002004020040200402004020040
802042003915510000023525801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000000111512291699200360800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9accfd0icache miss (d3)d5d6ddinst fetch restart (de)dfe0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420051155000402580010108000010800005064000000200202003920039999631001980010208000020800002003920039118002110910108000010000005024004163442003680000102004020040200402004020040
8002420039155000402580106108000010800005064000001200202003920039999631001980010208000020800002003920039118002110910108000010001005024007164342003680000102004020040200402004020040
8002420039161000705258001010800001080000506400000120020200392003999963100198001020800002080000200392003911800211091010800001000001295024004164342003680000102004020040200402004020040
8002420039155000402580010108000010801055064082401200202003920039999631001980010208000020800002003920039118002110910108000010000065026007164642003680000102004020040200402004020040
800242003915601040402580010108000010800005064000000200202003920039999631001980010208000020800002003920039118002110910108000010001005024304167642003680000102004020040200402004020040
8002420039155000402580010108000010800005064000001200202003920039999631001980010208000020800002003920039118002110910108000010000005024004164342003680000102004020040200402004020040
8002420039155000402580010108000010800005064000000200202008820039999631001980010208000020800002003920039118002110910108000010000005024004164752003680000102004020040200402004020040
8002420039156000402580010108000010800005064000001200202003920039999631001980010208000020800002003920039118002110910108000010003205024305323442003680000102004020040200402004020040
8002420039156000402580010108000010800005064000001200202003920039999631001980010208000020800002003920039118002110910108000010000005024034711164442003680000102004020040200402004020040
8002420039155000402580010108000010800005064000000200202003920039999631001980010208000020800002003920039118002110910108000010001035024004164442003680000102004020040200402004020040