Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FCVTNS (scalar, D to X)

Test 1: uops

Code:

  fcvtns x0, d0
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 2.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 2.000

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst integer (97)accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
200454140432530001000200020001800005225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331623538100010001000542542542542542
2004541418432530001000200020001800005225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800005225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454149432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542
200454140432530001000200020001800015225415412483274200020002000541541111001100007331633538100010001000542542542542542

Test 2: Latency 1->2 roundtrip

Code:

  fcvtns x0, d0
  fmov d0, x0
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)0318191e1f3f4f5051inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
3020413003897400001300231194170254010910100200001000010020000100005006214979148010341130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000090000131013162212953410000100001000010100130039130039130039130039130039
30204130040974000013002311941702540100101002000010000100200001000050062149791480103411300130130038130038125476312624630100200100002000020010000200001300381300381120201100991001010010000100001000000210000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400001300231194170254010010100200001000010020000100005006214979148010341130013013003813003812547631262463010020010000200002001000020000130038130042112020210099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
30204130199974000013002311941702540100101002000010000100200001000050062149791480103411300130130038130038125476312624930100200100002000020010000200001300381300391120201100991001010010000100001000011085292000135022162212960010000100001000010100130040130039130039130039130039
30204130044974003301300231194170254010010100200001000010020000100005006214979148010341130013013003813003912547631262463010020010000200002001000020000130038130042112020110099100101001000010000100007000000131012162212952510000100001000010100130039130039130039130039130039
30204130038974005752813002311941702540100101002000010000100200001000050062149791480103411300130130038130038125476312624730100200100002000020010000200001300381300381120201100991001010010000100001000000930000131012162212952510000100001000010100130039130039130039130039130039
3020413005397400001300231194170254010010100200001000010020000100005006214979148010341130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012172212952510000100001000010100130039130039130039130039130039
30204130038974005401300231194170254010010100200001000010020000100005006214979148010341130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400001300231194170254010010100200001000010020000100005006214979148026201130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400001300231194170254010010100200001000010020000100005006214979148010341130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039

1000 unrolls and 10 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)03090b18191e3a3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc3c5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
3002413003810080000001300231194172540010100102000010000102000010000506214979148000250130013130038130038125499312626830010201000020000201000020000130038130038112002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000251130013130038130096125498312626830010201000020000201000020000130038130038112002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000251130015130038130038125499312626830010201000020000201000020000130201130040112002110910100101000010001000000300012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000250130013130038130038125506312626830010201000020000201000020000130038130038212002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000251130013130038130098125498312626830010201000020000201000020000130038130038112002110910100101000010001000000000012702161512952510000100001000010010130039130039130039130039130039
3002413003810080000001300251194172540010100102000010000102000010000506214979148000250130013130104130058125498312626830010201000020000201000020000130038130038112002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
3002413003810080002001300231194172540010100102000010000102000010000506214979148000250130013130038130112125498312626830010201000020000201000020000130038130038112002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000251130013130099130045125498312626830010201000020000201000020000130069130038112002110910100101000010001000000000012701161112952510000100001000010010130039130039130039130039130039
300241300381008000000130023119417254001010010200001000010200001000050621497914800025113001313003813013312549831262683001020100002000020100002000013003813003811200211091010010100001000100000001300770012701161112952510000100001000010010130039130039130039130039130039
3002413003810080000001300231194172540010100102000010000102000010000506214979148000250130018130038130110125498312626830010201000020000201000020000130038130038112002110910100101000010001000000000012701161112952810000100001000010010130039130039130039130039130039

Test 3: throughput

Count: 8

Code:

  fcvtns x0, d8
  fcvtns x1, d8
  fcvtns x2, d8
  fcvtns x3, d8
  fcvtns x4, d8
  fcvtns x5, d8
  fcvtns x6, d8
  fcvtns x7, d8
  mov x8, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)03081e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5e60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)dfe0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602044004131000322524010480100160004100160020500144013200400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119316002400388000080000801004004240042400424004240042
1602044004131000322524010480100160004100160020500144013200400220400414004119977619992160120200160032200160032400414004111802011009910080100100031115119016002400388000080000801004004240042400424004240042
1602044004131100322524010480100160004100160020500144013201400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240042400424004240042
1602044004132100322524010480100160004100160020500144013201400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240042400424004240042
1602044004131100322524010480100160004100160020500144013201400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016012401268000080000801004004240042400424004240042
16020440041310015322524010480100160004100160020500144013200400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240042400424004240042
1602044004131000322524010480100160004100160020500144013200400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016012400388000080000801004004240042400424004240042
1602044004131000322524010480100160004100160020500144013201400223400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240042400424004240042
1602044004131000322524010480100160004100160020500144013201400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240042400424004240042
1602044004131100322524010480100160004100160020500144013201400220400414004119977619992160120200160032200160032400414004111802011009910080100100001115119016002400388000080000801004004240129400424004240042

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)030a0b0f18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cfd5d6d9ddinst fetch restart (de)e0? int output thing (e9)ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024400423100000000707252400108001016000010160000501440000040022040041400411999632002116001020160000201600004004140041118002110910800101000000000005020716057400388000012180000800104004240042400424004240042
1600244004132200000001062524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050205160554003880000080000800104004240042400424004240042
160024400413100000000762524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050203160534003880000080000800104004240042400424004240042
160024400413220000000822524001080010160000101600005014400000400220400414004119996320021160010201600002016000040041400411180022109108001010000000000050204160644003880000080000800104004240042400424004240042
1600244004131000000002782524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050203160534003880000080000800104004240042400424004240042
16002440041311000000062525240010800101600001016000050144000014002204004140041199967420021160010201600002016000040041400411180021109108001010000000000050203160354003880000080000800104004240042400424004240042
160024400413100000000762524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050203160544003880000080000800104004240042400424004240042
16002440041311000000010652524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050204160554003880000080000800104004240042401274004240042
160024400413100000000762524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050205160354003880000080000800104004240042400424004240042
160024400413100000000822524001080010160000101600005014400001400220400414004119996320021160010201600002016000040041400411180021109108001010000000000050206160454003880000080000800104004240042400424004240042