Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FCVTNS (scalar, S to W)

Test 1: uops

Code:

  fcvtns w0, s0
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 2.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 2.000

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst integer (97)a8a9cfd5d6ddinst fetch restart (de)e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110001073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045415043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110000073216225381000010001000542542542542542
20045414043253000100020002000180000522541541248327420002000200054154111100110001073216225381000010001000542542542542542
20045414043253000100020002000180001522541541248327420002000200054154111100110000073216225381000010001000542542542542542

Test 2: Latency 1->2 roundtrip

Code:

  fcvtns w0, s0
  fmov d0, x0
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)0308090b18191e1f3a3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
3020413003897400000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020128130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119462254010010100200001000010020000100005006214979148010340130013013005413003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
30204130038974000000001300231194172540100101002000310000100200001000050062149791480103401300130130038130038125476312624630100200100002000020010000200001300381300381120201100991001010010000100101000005016933000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000900130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119417254010010100200001000010020000100005116214979148010340130013013003813003912547631262473010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000900130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012161212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119421254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010064200002001000020000130038130038112020110099100101001000010000100000000000131012162212952510000100001000010100130039130039130039130039130039
3020413003897400000000130023119417254010010100200001000010020000100005006214979148010340130013013003813003812547631262463010020010000200002001000020000130038130038112020110099100101001000010000100000000000131012162212952810000100001000010100130039130039130039130039130039

1000 unrolls and 10 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)031e3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acbranch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
300241300389740130023119417254001010010200001000010200001000050621507514800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
300241300389740130023119417254001010010200001000010200001000050621507514800025013001313003813003812555231262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
300241300389740130023119417254001010010200001000010200001000050621502714800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
300241300389740130023119417254001010010200001000010200001000050621512314800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952710000100001000010010130039130039130039130039130039
300241300389740130023119417254001010010200001000010200001000050621497914800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
300241300389740130023119417254001010010200001000010200001000050621517114800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701162112952510000100001000010010130039130039130039130039130039
300241300449740130023119417254001010010200001000010200001000050621512314800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
300241300389743130023119417254001010010200001000010200001000050621497914800025013001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100003000012701161112952510000100001000010010130039130039130039130039130043
300241300389740130023119417254001010010200031000010200001000050621521914800025113001313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039
3002413003897501300231194172540010100102000010000102000010000506214979148000250130013130074130041125498201263183001020100002000020100002000013003813004111200211091010010100001000100000000012701161112952510000100001000010010130039130039130039130039130039

Test 3: throughput

Count: 8

Code:

  fcvtns w0, s8
  fcvtns w1, s8
  fcvtns w2, s8
  fcvtns w3, s8
  fcvtns w4, s8
  fcvtns w5, s8
  fcvtns w6, s8
  fcvtns w7, s8
  mov x8, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)0308090b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5e60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa0a1a6a7a8a9acc5branch mispredict (cb)cdcfd6e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440041322000000003225240104801001600041001600205001440132004002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
16020440041310000000003225240104801001600041001600205001440132004002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
160204400413100000012003225240104801001600041001600205001440132004002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
16020440041310000000003225240104801001600041001600205001440132004002240041400411997761999216030820016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
16020440041310000000003225240104801001600041001600205001440132004002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
160204400413100001000012725240104801001601881001600205001440132004002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042
1602044004131310114121596105605694302243561812481625721041626307141460010004079540967402002026588205791623542041624702061624984107941060131802011009910080100100220010100931115117164003880000080000801004004240042400424004240042
16020440041310000910106879207605192243584813341623561051624585581461840004085240978409932029396205311625922041625122021620564106941083141802011009910080100100000100011151171244087481176080000801004115941001410014099441001
1602044122132100014142112140804994373244824815241630681081630845981468779004098141069413152028512319992160120200160032200160032400414004111802011009910080100100022000812511153261154055781242080000801004077140042400424004240042
16020440041311001009242641772226240116802041600121001600205001440132104002240041400411997761999216012020016003220016003240041400411180201100991008010010000000001115117164003880000080000801004004240042400424004240042

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)03041e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa8accfd0d5d6d9ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002440042300107072524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200271602127400388000080000800104004240042400424004240042
1600244004129900422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200161602326400388000080000800104004240042400424004240042
1600244004130000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200271602727400388000080000800104004240042400424004240042
1600244004130000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200201601723400388000080000800104004240042400424004240042
1600244004131600422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010101050200271602727400388000080000800104004240042400424004240042
16002440041300007072524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200171602716400388000080000800104004240042400424004240042
1600244004130000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200281602128400388000080000800104004240042400424004240042
1600244004130000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200161602718400388000080000800104004240042400424004240042
1600244004130000422524029080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200271602725400388000080000800104004240042400424004240042
1600244004130000422524001080010160000101600005014400000400224004140041199963200211600102016000020160000400414004111800211091080010100050200271602727400388000080000800104004240042400424004240042