Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FCVTZS (scalar, fixed-point, S to W)

Test 1: uops

Code:

  fcvtzs w0, s0, #3
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 2.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 2.000

retire (01)cycle (02)030b1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst integer (97)a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
20045414004325300010002000200018000152254154124832742000200020005415411110011000037331633538100010001000542542542542542
20045414005625300010002000200018000052254154124832742000200020005415411110011000037331633538100010001000542542542542542
200454140043253000100020002000180001522541541248327420002000200054154111100110000247331633538100010001000542542542542542
20045414004325300010002000200018000152254154124832742000200020005415411110011000037331633538100010001000542542542542542
200454140943253000100020002000180001522541541248327420002000200054154111100110000187331633538100010001000542542542542542
20045414004325300010002000200018000152254154124832742000200020005415411110011000607321633538100010001000542542542542542
20045414004325300010002000200018000152254154124832742000200020005415411110011000007331633538100010001000542542542542542
20045414004325300010002000200018000152254154124832742000200020005415411110011000007331633538100010001000542542542542580
20045414004325300010002000200018000152254154124832742000200020005415411110011000007331633538100010001000542542542542542
20045414104325300010002000200018000152254154124832742000200020005415411110011000007331633538100010001000542542542542542

Test 2: Latency 1->2 roundtrip

Code:

  fcvtzs w0, s0, #3
  fmov d0, x0
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)030b18191e1f3a3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd0d5d6daddinst fetch restart (de)e0? int output thing (e9)ebld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
302041300389740000001300231194172540100101002000010000100200001000050062149791480103411300401300381300381254763126265301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101316033129526100000100001000010100130039130039130039130039130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103411300461300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101316033129525100000100001000010100130039130039130039130039130042
302041300389740000001300231194172540100101002000010000100200001000050062150751480103401300491300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101216023129525100000100001000010100130039130039130039130039130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103401300151300381300381254763126246301002001000020000202100002000013003813006711202011009910010100100001000010000000000013100316022129525100000100001000010100130039130039130039130039130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103411300131300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101216032129525100000100001000010100130039130039130039130039130039
302041300389740000001300241194172540100101002000010000100200001000050062149791480103411300321300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000103000013101216022129525100000100001000010100130040130043130039130040130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103401300321301311300381254763126355307762021000020000202100002000013003813004111202011009910010100100001000010000000000013101216033129525100000100001000010100130039130039130039130042130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103411300141300401300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000100000013101316032129525100000100001000010100130039130039130040130039130042
302041300449740000001300231194172540100101002000010000100200001000050062149791480103401300601300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101216032129525100000100001000010100130039130039130039130039130039
302041300389740000001300231194172540100101002000010000100200001000050062149791480103411300391300381300381254763126246301002001000020000200100002000013003813003811202011009910010100100001000010000000000013101316033129525100000100001000010100130039130039130039130039130039

1000 unrolls and 10 iterations

Result (median cycles for code): 13.0038

retire (01)cycle (02)0307080a0b18191e1f3a3f4f5051inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8accdcfd2d5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
30024130038100800000000013002311941722540010100102000010000102000010000506214979148000250130013013003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000127001162212952510000100001000010010130039130039130039130039130039
30024130038104400000000013002311941702540036100112000010000102000010000506214979148000251130013013003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000127004164412952510000100001000010010130039130075130072130039130039
300241300381008000000000130023119419025400101001020000100001020000100005062149791480002511300140130038130038125498221262723001020100002000020100002000013003813003811200211091010010100001000100000000127005164412952510000100001000010010130039130039130039130039130039
30024130038100800000000013002311941702540010100102000010000102000010000506214979148000251130013013003813004112549831262683001020100002000020100002000013003813003811200211091010010100001000100000400127003162312952510000100001000010010130039130039130042130039130039
3002413003897400000000013002311941702540010100102000010000102000010000506214979148000250130013013003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000200127002163312952510000100001000010010130039130039130039130123130070
30024130038992000100000130023119417025400101001020000100001020000100005062149791480002501300130130038130038125498312626830010201000020000201000020000130038130038112002110910100101000010001000000001969029337313213216310043100001000010010133057132897132829131338130041
3002413014197481614135542435200130023119430011040023100102000010000102000010000506214979148000250130013313003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000127003163312952510000100001000010010130039130039130039130044130039
30024130041986000000120013002311941702540010100102000010000102000010000506214979148000250130013013003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000127003163312952510000100001000010010130039130039130039130039130039
3002413003897400000000013002311946602540010100102000010001102000010000506214979148000250130013013003813003812549831262683001020100002000020100002000013003813003811200211091010010100001000100000000127002161312952510000100001000010010130039130039130039130039130039
3002413003897300000000013002311950202540010100102000010000102000010000506214979148000251130013013003813003812551431262683001020100002000020100002000013003813003811200211091010010100001000100000000127002162112952510000100001000010010130039130039130039130135130039

Test 3: throughput

Count: 8

Code:

  fcvtzs w0, s8, #3
  fcvtzs w1, s8, #3
  fcvtzs w2, s8, #3
  fcvtzs w3, s8, #3
  fcvtzs w4, s8, #3
  fcvtzs w5, s8, #3
  fcvtzs w6, s8, #3
  fcvtzs w7, s8, #3
  mov x8, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)030a0b1e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5d60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa8acc5branch mispredict (cb)cdcfd5d6inst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204400623100000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001001011151172160400388000080000801004004240042400424004240042
160204400413110000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042
160204400413110000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001001311151170160400388000080000801004004240042400424004240042
160204400413100000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001001311151170160400388000080000801004004240042400424004240042
160204400413110000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042
160204400413100000322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042
1602044004131000006972524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042
160204400413100000602524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001001011151170160400388000080000801004004240042400424004240042
1602044004131000001402524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042
160204400413100030322524010480100160004100160020500144013200400224004140041199776199921601202001600322001600324004140041118020110099100801001000011151170160400388000080000801004004240042400424004240042

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)9fa0a1a6a7a8acc2cdcfd5d6d9ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244005531000000042252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020216011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
1600244004131100000042252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
16002440041310000000707252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000040022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042
160024400413110000004225240010800101600001016000050144000014002240041400411999632002116001020160000201600004004140041118002110910800101000000231005020116011400388000080000800104004240042400424004240042
1600244004131000000042252400108001016000010160000501440000140022400414004119996320021160010201600002016000040041400411180021109108001010000000005020116011400388000080000800104004240042400424004240042