Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FMULX (by element, 4H)

Test 1: uops

Code:

  fmulx v0.4h, v0.4h, v1.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a1a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038
10044037310613407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000030073116113473100040384038403840384038
10044037300993407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038
100440373045613407251000100010005319081401840374037325833895100010002000403740371110011000014073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000060073116113473100040384038403840384038
100440373006134072510001000100053190814018403740373258338951000100020004037403711100110000001273116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000000073116113473100040384038403840384038

Test 2: Latency 1->2

Code:

  fmulx v0.4h, v0.4h, v1.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
1020440037300117061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400372990061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100107101161139479100001004003840038400384003840038
10204400372990061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400864003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400372990061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100007101161139479100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)0308181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002440037300000536394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394073610010101000010100005057069080400184008340037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069080400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069080400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003729900061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069080400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000000640316333947310000104003840038400384003840038

Test 3: Latency 1->3

Code:

  fmulx v0.4h, v1.4h, v0.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)0307080a18191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102044003730010100061394074410100100100001001000050057083040400180400374003738115638741101002001000820020016400374003711102011009910010010000100000000011171711611394930100001004003840038400384003840038
102044003730010100097394072510100100100001001000050057069080400180400374003738115738740101002001000820020016400374003711102011009910010010000100000000011171711611394930100001004003840038400384003840038
1020440037300101005761394072510100100100001001000050057069080400180400374003738115738741101002001000820020016400374003711102011009910010010000100000000011171711611394930100001004003840038400384003840038
102044003730010100061394072510100100100001001000050057069080400180400374003738115738741101002001000820020016400374003711102011009910010010000100000000011171811611394930100001004003840038400384003840038
102044003730010100061394072510100100100001001000050057069080400180400374003738108338745101002041000020020000400374003721102011009910010010000100000000000071021622394790100001004003840038400384003840038
102044003730000000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100000000000071021622394790100001004003840038400384003840038
102044003729900000061394072510100100100001001000050057069080400180400374003738108338766101002001000020020000400374003711102011009910010010000100000100000071021622394790100001004003840038400384003840038
102044003730000000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100000000000071021622394790100001004003840038400384003840038
102044003730000000061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100000000000071021622394790100001004003840038400384003840038
102044003730000100061394072510100100100001001000050057069080400180400374003738108338745101002001000020020000400374003711102011009910010010000100000000000071021622394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)03191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024400373000108006139407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100006407162239473010000104008140038400384003840038
1002440037300033006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003730006006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003730000006139407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003729900008239407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003730006006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003730000006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
100244003730006006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038
1002440037300027006139407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100006402165239473010000104003840038400384003840038
1002440037300015006139407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100006402162239473010000104003840038400384003840038

Test 4: throughput

Count: 8

Code:

  fmulx v0.4h, v8.4h, v9.h[1]
  fmulx v1.4h, v8.4h, v9.h[1]
  fmulx v2.4h, v8.4h, v9.h[1]
  fmulx v3.4h, v8.4h, v9.h[1]
  fmulx v4.4h, v8.4h, v9.h[1]
  fmulx v5.4h, v8.4h, v9.h[1]
  fmulx v6.4h, v8.4h, v9.h[1]
  fmulx v7.4h, v8.4h, v9.h[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03091e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200601500570422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051102161120037800001002004120041200412004120041
80204200401500180422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
8020420040150000422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
8020420040150000422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204200401500001372580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
802042004015003450422580100100800001008012050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
8020420040150000422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204200401500004225801001008000010080000500640000200212004020040997322999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
8020420040150000422580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204200401500005172580100100800001008000050064000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0318191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420049150000412580010108000010800005064000020025200402004099963100208001020800002016000020040200401180021109101080000100305020151612122003780000102004120041200412004120041
80024200401500015412580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100305038131613132008780000102004120041200412004120041
80024200401500004125800101280101108000050641672200212004020040100073100488001020800002016000020040200401180021109101080000100005020151614172003780000102004120041200412004120041
80024200401500021832580010108000010800005064000020021200402004099963100208001020800002016000020116200402180021109101080000101005020121615152003780000102004120041200412004120041
8002420040150000832580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100005020111611112003780000102004120041200412004120041
80024200401500021412580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100005020121615162003780000102004120041200412004120041
800242004015000258832580010108000010800005064000020021200402004099963100208001020800002016021420040200401180021109101080000100005020161615152003780000102004120041200412004120041
800242004015000132412580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100005020171612162003780000102004120041200412004120041
800242004015003105412580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100005020121614152003780000102004120041200412004120041
8002420040150000412580010108000010800005064000020021200402004099963100208001020800002016000020040200401180021109101080000100005020151614162003780000102004120041200412004120041