Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FMUL (by element, 4H)

Test 1: uops

Code:

  fmul v0.4h, v0.4h, v1.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
1004403730198613407251000100010005319080401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319080401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895114810002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319081401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037300613407251000100010005319080401840374037325833895100010002000403740371110011000073116113473100040384038403840384038
10044037306613407251000100010005319080401840374037325833895100010002000403740371110011000073116113473100040384038403840384038

Test 2: Latency 1->2

Code:

  fmul v0.4h, v0.4h, v1.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)0318191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020440037299001211143940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011641394980100001004003840038400384003840038
10204400373000006139407251010010010000100100005005706908140018400374003738108338745101002001000020020000400374003711102011009910010010000100000020802273323968628100001004027540464402744046440038
10204400852990006453393891841016214710006100100005005706908040018400374003738108338745101002001000020020000400374003711102011009910010010000100212251850071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010001030071011711394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000071011611394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024400373000613940725100101010000101000050570690804001840037400373813003387671001020100002020000400374003711100211091010100001000006404162239473010000104003840038400384003840038
10024400373000613940725100101010000101000050570690814001840037400373813003387671001020100002220000400374003711100211091010100001000006402162239473010000104003840038400384003840038
10024400373000613940725100101010000101000050570690814001840037400373813003387671001020100002020000400374003711100211091010100001000006402162239473010000104003840038400384003840038
10024400373000613940725100101010000101000050570690804001840037400373813003387671001020100002020000400374003711100211091010100001000006402162239473010000104013240085400384003840038
1002440037300016839407251001014100301210296665706908040018400374003738130012387861001020100002020000400374003711100211091010100001040006402162239512310000104003840038400384003840038
10024400373000613940725100101010000101000050570690804001840037400373813403387671001020100002020000400374003711100211091010100001000006402162239473010000104003840038400384003840038
100244003730024613940725100101010000101000050570690814001840037400373813003387671001020100002020000400374003711100211091010100001000006402162239473010000104003840038400384003840038
10024400372990613940725100101010000101000050570690804001840037400373813003387671001020100002020000400374003711100211091010100001000006402163239473010000104003840038400384003840038
10024400372990613940725100101010000101000050570690814001840037400373813003387671001020100002020000400374003711100211091010100001000006402162239473010000104003840038400384003840038
10024400372990613940725100101010000101000050570690804001840037400373813003387671001020100002020000400374003711100211091010100001000006402162239473010000104003840038400384003840038

Test 3: Latency 1->3

Code:

  fmul v0.4h, v1.4h, v0.h[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd0d2d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020440037299061394072510100100100001001000050057069080540018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011611394790100001004003840038400384003840038
1020440037300082394072510100100100001001000050057069081040018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011631394790100001004003840038400384003840038
1020440037299061394072510100100100001001000050057069081540018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069080040018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081540018400374003738108338745101002001000020020000400374003711102011009910010010000100007105111611394790100001004003840038400384003840038
10204400373000143394072510100100100001001000050057069080040018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069080040018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011631394790100001004003840038400384003840038
1020440037299061394072510100100100001001000050057069080040018400374003738108338745101002001000020020000400374003711102021009910010010000100007105111611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081540018400374003738108338745101002001000020020000400374003711102011009910010010000100007100011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081540018400374003738108338745101002001000020020000400374003711102011009910010010000100007105111611394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024400373009823939843100181010006101000050570690840018400374003738130338804100102010000202000040037400372110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100001640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037402261110021109101010000100000640216223947310000104003840038400384003840038
100244003730007263940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400804003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640316223947310000104003840038400384003840038
100244003730004313940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038
10024400373000613940725100101010000101000050570690840018400374003738130338767100102010000202000040037400371110021109101010000100000640216223947310000104003840038400384003840038

Test 4: throughput

Count: 8

Code:

  fmul v0.4h, v8.4h, v9.h[1]
  fmul v1.4h, v8.4h, v9.h[1]
  fmul v2.4h, v8.4h, v9.h[1]
  fmul v3.4h, v8.4h, v9.h[1]
  fmul v4.4h, v8.4h, v9.h[1]
  fmul v5.4h, v8.4h, v9.h[1]
  fmul v6.4h, v8.4h, v9.h[1]
  fmul v7.4h, v8.4h, v9.h[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005915000000312580108100800081008002050064013212002102004020040997769991801202008003220016006420040200401180201100991001008000010000000111511811600200370800001002004120041200412004120041
802042004015000000312580108100800081008002050064013212002102004020040997769991801202008003220016006420040200401180201100991001008000010000000111511801600200370800001002004120041200412004120041
802042004015000000312580100100800001008000050064000012002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
8020420040150000006032580100100800001008000050064000002002132004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
8020420040150000005172580100100800001008000050064000012008202010420040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
8020420040150000001262580100100800001008000050064000002002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
8020420040150000002962580100100800001008000050064000012002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
802042004015000000422580100100800001008000050064000012002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041
802042004015000000422580100100800001008000050064000002002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011612200370800001002004120041200412004120041
802042004015000000422580100100800001008000050064000012002102004020040997339998801002008000020016000020040200401180201100991001008000010000000000511011611200370800001002004120041200412004120041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242004915094125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116122003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015064125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
8002420040150154125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041
800242004015004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020116112003780000102004120041200412004120041