Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FMUL (by element, 4S)

Test 1: uops

Code:

  fmul v0.4s, v0.4s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373106134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110001073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110004373116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073116113473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000373116113473100040384038403840384038

Test 2: Latency 1->2

Code:

  fmul v0.4s, v0.4s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204400372990613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690814005340037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011612394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690814001840037400373810833876410100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400373000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
102044003730002323940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
10204400372990613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000071011611394790100001004003840038400384003840038
102044003730045613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000171011611394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc2cfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002440037300061394072510010101000010100005057069081540018400374003738130033876710010201000020200004003740037111002110910101000010000064054164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081540018400374003738130033876710010201000020200004003740037111002110910101000010000064054164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064034164439473010000104003840038400384003840038
1002440037299061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064034164439473010000104003840038400384003840038
10025400373000103394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064033164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064033164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064033164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064034164439473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064034164339473010000104003840038400384003840038
1002440037300061394072510010101000010100005057069081340018400374003738130033876710010201000020200004003740037111002110910101000010000064034164439473010000104003840038400384003840038

Test 3: Latency 1->3

Code:

  fmul v0.4s, v1.4s, v0.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071012511394790100001004003840038400384003840038
10204400373000726394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037299061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001002000171011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381343387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037299061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038
1020440037300061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000071011611394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)030809181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002440037300000061394072510010101000010100005057069080040018040037400373813033876710010201000020200004003740037111002110910101000010000006405163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069080040018040037400373813033876710010201000020200004022840037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037299000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020206484003740037111002110910101000010000006613163339473010000104003840038400384003840038
1002440037299000089394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339509010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038
1002440037300000061394072510010101000010100005057069081040018040037400373813033876710010201000020200004003740037111002110910101000010000006403163339473010000104003840038400384003840038

Test 4: throughput

Count: 8

Code:

  fmul v0.4s, v8.4s, v9.s[1]
  fmul v1.4s, v8.4s, v9.s[1]
  fmul v2.4s, v8.4s, v9.s[1]
  fmul v3.4s, v8.4s, v9.s[1]
  fmul v4.4s, v8.4s, v9.s[1]
  fmul v5.4s, v8.4s, v9.s[1]
  fmul v6.4s, v8.4s, v9.s[1]
  fmul v7.4s, v8.4s, v9.s[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200601503094225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051103161120037800001002004120041200412004120041
80204200401502734225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
8020420040150274225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204201111502824225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204200401504414225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101162120037800001002004120041200412004120041
8020420040150214225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051102161120037800001002004120041200412004120041
802042004015004225801001008000010080000500640000120021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
802042004015006325801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
802042004015004225801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041
80204200401502644249801001008000010080000500640000020021200402004099733999880100200800002001600002004020040118020110099100100800001000051101161120037800001002004120041200412004120041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b181e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd2d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242004915000304125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
80024200401500022204125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
80024200401500025504125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
80024200401500042904125800101080000108000050640000200212004020040999631002080010208000020160214200402004011800211091010800001000050200116112003780000102004120041200412004120041
800242004015000004125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
800242004015010004125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
800242004015000004125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
800242004015000904125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
8002420040150002704125800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041
8002420040150000032625800101080000108000050640000200212004020040999631002080010208000020160000200402004011800211091010800001000050200116112003780000102004120041200412004120041