Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

FMUL (scalar, D)

Test 1: uops

Code:

  fmul d0, d0, d1
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073216333473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073316233473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000373316333473100040384038403840384038
1004403730061340725100010001000531908140184037403732583389510001000200040374037111001100012473316333473100040384038403840384038
100440373106134072510001000100053190814018403740373258338951000100020004037403711100110000373316333473100040384038403840384038
100440373006134072510001000100053190814018403740373258338951000100020004037403711100110000373316333473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000073316333473100040384038403840384038
100440373006134072510001000100053190814018403740373258338951000100020004037403711100110000073216333473100040384038403840384038
100440373106134072510001000100053190814018403740373258338951000100020004037403711100110000373316333473100040384038403840384038
100440373006134072510001000100053190804018403740373258338951000100020004037403711100110000373316333473100040384038403840384038

Test 2: Latency 1->2

Code:

  fmul d0, d0, d1
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8acc5cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020440037300015613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000000307101161139479100001004003840038400384003840038
102044003730000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010022010307101161139479100001004003840038400384008740134
1020440037300101033940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000000007101161139479100001004003840038400384003840038
102044003730000613940725101001001000010010000500571237814001840037400373810833874510261200100002002000040037400371110201100991001001000010000000007101161139479100001004003840038400384003840038
1020440037300006139407251010010010000132100005005706908040018400374003738108338745101002001000020020000400374003711102011009910010010000100000001807101161139479100001004003840038400384003840038
1020440037300021613940725101001001000010010000500570690804001840037400373810833874510100200100002002000040037400371110201100991001001000010000000307101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069080400184003740037381083387451010020010000200200004003740037111020110099100100100001000000010507101161139479100001004003840038400384003840038
1020440037300006139407251010010010000100100005005706908140018400374003738108338745101002001000020020000400374003711102011009910010010000100000001207101161139479100001004003840038400384003840038
102044003730000613940725101001001000010010000664570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000002607101161139479100001004003840038400384003840038
10204400373000061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000000017707101160139479100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)030b1e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024400373000006139407251001010100001010000505706908040018040037400373813033876710010201000020200004003740037111002110910101000010000020300640316223947310000104003840038400384003840038
1002440037300000346394072510010101000010100005057069080400180400374003738130338767100102010000202000040037400371110021109101010000100000007200640216223947310000104003840038400384003840038
10024400373000006139407251001010100001010000505706908140018040037400373813033876710010201000020200004003740037111002110910101000010000010900640216223947310000104003840038400384003840038
100244003730000098394072510010101000010100005057069081400180400374003738130338767100102010000202000040037400371110021109101010000100000350000640216223947310000104003840038400384003840038
100244003729900061394072510010101000010100005057069081400180400374003738130338767100102010000202000040037400371110021109101010000100021270000640216223947310000104003840038400384003840038
10024400373000006139407251001010100001010000505706908140018040037400373813033876710010201000020200004003740037111002110910101000010000080300640216223947310000104003840038400384003840038
10024400372990006139407251001010100001010000505706908140018040037400373813033876710010201000020200004003740037111002110910101000010000090000640216223947310000104003840038400384003840038
100244003730000061394072510010101000010100005057069081400180400374003738130338767100102010000202000040037400371110021109101010000100000420000640216223947310000104003840038400384003840038
10024400372990006139407251001010100001010000505706908040018040037400373813033876710010201000020200004003740037111002110910101000010000030000640216223947310000104003840038400384003840038
10024400373000006139407251001010100181010000505706908140018040037400373813033876710010201000020200004003740037111002110910101000010020050000640216223947310000104003840038400384003840038

Test 3: Latency 1->3

Code:

  fmul d0, d1, d0
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)0308181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102044003730000061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000031071011611394790100001004003840038400384003840038
102044003730000061394072510100100100001001000050057069081400184003740037381083387451010020010000200200004003740037111020110099100100100001000001971011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000036071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000031071011610394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000036071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010020040071011611394790100001004003840038400384003840038
102044003729900061394072510100100100001001000050057069081400184003740037381083387451010020010000200203444003740037111020110099100100100001000003071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000041071011611394790100001004003840038400384003840038
1020440037300000613940725101001001000010010000500570690814001840037400373810833874510100200100002002000040037400371110201100991001001000010000037071011611394790100001004003840038400384003840038
10204400373000006139407251010010010000100100005005706908140018400374003738108338745101002001000020020000400374003711102011009910010010000100000018071011611394790100001004003840038400384003840038

1000 unrolls and 10 iterations

Result (median cycles for code): 4.0037

retire (01)cycle (02)03080b18191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8acc5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002440037300000006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100019006402162239473010000104003840038400384003840038
10024400372990000012939407251001010100001010000555706908140018400374003738130338767100102010000202000040037400371110021109101010000100266006402162239473010000104003840038400384003840038
1002440037300000001933940725100101010000101000050570690804001840037400373815133876710010201000020200004003740037111002110910101000010000111006402162239473010000104003840038400384003840038
10024400373000000044939407251001010100001010000505706908140018400374003738130338767100102010000202000040037400371110021109101010000100013006402162239473010000104003840038400384003840038
10024400373000000061394072510010101000010100005057069081400184003740037381303387671001020100002020344400374003711100211091010100001000340006402161239473010000104003840038400384003840038
10024400373000000061394072510010101000010100005057069081400184003740037381303387671001020100002020000400374003711100211091010100001000290006402162239473010000104003840038400384003840038
1002440037300010006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100010006402162239473010000104003840038400384003840038
10024400373000000072639407251001010100001010000505706908140018400374003738130338767100102010169202000040037400371110021109101010000100040006402162239473010000104003840038400384003840038
10024400373000000061394072510010101000010100005057069081400184003740037381303387671001020101722020000400374003711100211091010100001000470006402162239473010000104003840038400384003840038
1002440037300000006139407251001010100001010000505706908040018400374003738130338767100102010000202000040037400371110021109101010000100050006402162239473010000104003840038400384003840038

Test 4: throughput

Count: 8

Code:

  fmul d0, d8, d9
  fmul d1, d8, d9
  fmul d2, d8, d9
  fmul d3, d8, d9
  fmul d4, d8, d9
  fmul d5, d8, d9
  fmul d6, d8, d9
  fmul d7, d8, d9
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03070a0b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9acc2c5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042006015000000000422580100100800001168000050064000012002120040200409973399988033220080000200160000200402004011802011009910010080000100002075000511041645200370800001002004120041200412004120041
80204200401500000090042258010010080000100800005006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000000000511051645200370800001002004120041200412004120041
80204200401500000000042258010010080409100800005006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000103000511041654200370800001002004120041200412004120041
80204200401500000000042258010010080000100800005006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000000000511041654200370800001002004120041200412004120041
80204200401500000000042258010011080000100800005006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000900000511041645200370800001002004120041200412004120041
8020420040150000000007072580100100800001008000050064000012002120040200409973399988010020080000200160000200402004011802011009910010080000100003103000511041654200370800001002004120041200412004120041
80204200401500000000042258010010080000100800005006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000000000511031654200370800001002004120041200412004120041
80204200401500000000042258010010080000100800006096400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000000000511041653200900800001002004120041200412004120041
80204200401500000000042258010010080000100801205006400001200212004020040997339998801002008000020016000020040200401180201100991001008000010000103000511051654200370800001002004120041200412004120041
80204200401500000000042258010010080000100800005006400001200212004020040997339998801002008000020016000020091200401180201100991001008000010000000000511031655200370800001002004120041200412004120041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b1e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242004015000008325800101080000108000050640000120021200402004099963100208001020800002016000020040200401180021109101080000101005020716242003780000102004120041200412004120041
800242004015000004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020216242003780000102004120041200412004120041
80024200401500000111825800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020416242003780000102004120041200412004120041
800242004015000004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020216422003780000102004120041200412004120041
8002420040150000040825800101080000108000050640000120021200402004099963100208001020800002016000020040200401180021109101080000100005020216242003780000102004120041200412004120041
8002420040150000010625800101080000108000050640000120021200402004099963100208001020800002016000020040200401180021109101080000100905020416422003780000102004120041200412004120041
800242004015000004125800101080000108000050640000120021200402004099963100208001020800002016000020040200401180021109101080000100005020416242003780000102004120041200412004120041
800242009215100008325800101080000108031750640000120021200402004099963100208001020800002016000020040200401180021109101080000100005020329342003780000102004120041200412004120041
8002420040150000049525800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000103905020416242003780000102004120041200412004120041
800242004015000004125800101080000108000050640000020021200402004099963100208001020800002016000020040200401180021109101080000100005020216242003780000102004120041200412004120041