Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

LD1 (multiple, post-index, 3 regs, 2S)

Test 1: uops

Code:

  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 1
  mov x1, 2
  mov x8, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 60 nops): 3.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03mmu table walk instruction (07)l2 tlb miss instruction (0a)0e0f191e223a3f43464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)5f61696d6emap rewind (75)map stall (76)dispatch uop (78)map ldst uop (7d)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst simd load (98)inst ldst (9b)9dl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss ld (a3)ld unit uop (a6)l1d cache writeback (a8)acafb5bbl1d cache miss ld nonspec (bf)c9cfd0d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
630052946423623190007145742897800024364300010002000100020005000100003016141290842982531030033000300029302293181161001100010000200004200000200040401331496526982313213462080833983814946482918110001634613797147912000100010002957529547296112952529498
63004295652371820000014761288480002429930031000200210002000500010000901615628797293673103000300030002913129128216100110001000020000420010020024040129929479694431479462074132583809541492860710001595313527149542000100010002936829394294612941029421
6300429279228161800013214668288980002426130001000200010002000500010000801616528812293283103000300030032928229292116100110001000020000420021020030000133419430697731789422061433043810849432858310001617213530149572000100010002932029440293262936429418
6300429401228201900116146682893201224331300010002000100020005000100004716227287882927631030003000300029170293302161001100010000200004200202200040401327496366936316611482076932883817749492856410001617013540149972000100010002935829415294002937729371
63004294162282421000014652289860002417230031000200010002000500010000601617828713292383293000300030002930829285116100110001000020000020000399200040601312494386910314511462062832033813949462852710001589613458148752000100010002942129282293212929429343
6300429305227202211101463928997100243933000100020001000200050001000070161322881429259310300030003000291652925111610011000100002000062002002000426013173941569193125124520635319638111344472858710001614413898150372000100010002935429367293182942629342
6300429323227162700043145862882600024215300010002000100020005000100004016141287322931031030003000300029272292371161001100010000200004200000200200601324996516909311774820771320838071052422863810001626013569150482000100010002933829341293352937429309
6300429304227191500001453528899000242383000100020001000200050001000010161622877229322310300030003000289662932211610011000100002000062000052000406013247946069323129165120692322738191248452851010001605713641147612000100010002933329299293292929029371
6300429332228202310001454228893011240713000100020001000200050001000080161442866129240310300030003000291852925211610011000100002000082002002002400012967933068973138134820604315538131147472847410001614213595148272000100010002913529354293952930129345
630042931722718210001146752894200024164300010002000100020005000100005016178288132924531030003000300029081291921161001100010000200004200000200002601309695756928321011542066532833808547572867710001661413649148652000100010002928129396292672939029483

Test 2: throughput

Count: 8

Code:

  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  ld1 { v0.2s, v1.2s, v2.2s }, [x6], x8
  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6
  mov x8, 0

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f18191e1f2223243a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)67696d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int alu (97)inst simd load (98)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss ld (a3)ld unit uop (a6)l1d cache writeback (a8)a9acafb5b6bbl1d cache miss ld nonspec (bf)l1d tlb miss nonspec (c1)c2branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd5map dispatch bubble (d6)ddfetch restart (de)e0e7? int output thing (e9)eaeb? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
2402058004062000000000029880001800252012122524010080100160000801001600002044971366349108001580040800404995334999824010020024000020024000080040801651180201100991001008000080000010016000002716003210016003201313500000511021633800371800000616000080000801008004180041800418004180041
24020480040621000000000380000080025201211252401008010016000080100160000206441036527230800158004080040499533499982401002002400002002400008004080040118020110099100100800008000001001600000351600310052160000615042130000511081633800370800000016000080000801008004180041800418004180041
240204800406201110100001200002800260151617572401008010016000080100160000205598636593790800158004080040499543499982401002002402562002400008004080040118020110099100100800008000001001600121342160050011316000061500120000511031653800370800009916000080000801008004180163800418004180041
24020480041621000001000380000180025212121125240100801001601228010016000020622603662696080015801388004049954349998240100200240000200240000800408004021802011009910010080000800000100160000027160032003160032012435000005110216328003718000010616000080000801008004180041800418004180041
24020480040620000000000370000180025012121125240100801001600008010016000020242303679352080015800408004049953357522102413282002400002002400008004080040118020110099100100800008000001001600000271600310034160000613239000005110316338003718000010616000080000801008004180041800418004180041
2402048004062000100110012000018002501212442524010080100160000801001600002064971366487708001580040800404995334999824010020024000020024000080040800401180201100991001008000080000010016000002916000000311601506024000000511031634800371800006616000080000801008016480041800418004180041
2402048004062100000110000000180025212121225240100801001601228010016000020649713669343080015801638004049953349998240100200240000200240000800408004011802011009910010080000800000100160000001600310026160268613135000005125416328003708000010616000080000801008004180041800418004180041
24020480040620000000000380000180025212012252401008010016000080100160000206497136660580800158004080040499533500792401002002400002002400008004080040118020110099100100800008000011001600000016000020016003761000000051103163280039080000101016000080000801008004180125800428012580041
2402048004062100000000038000118002501212112524010080100160000801001600002070175367598708001680040800404995334999824010020024000020024000080040800401180201100991001008000080000010016000000160031003116000001035020005110316338003708000010616000080000801008004180041800418004180041
24020480040620000001000400000180025012121125240100801641601228018216016120616413685343080015800408004049953349999240100200240000200240000800408004011802011009910010080000800000100160000027160032002416002400240000005110316338003718000010016000080000801008004180041800418004180041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)09l2 tlb miss data (0b)0e18191e1f233a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int alu (97)inst simd load (98)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)l1d cache writeback (a8)a9acafb5b6b8bbl1d cache miss ld nonspec (bf)l1d tlb miss nonspec (c1)c2cdcfd5map dispatch bubble (d6)dbddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
240025800406211010100056002800252161616252400108001016000080010160000204804536726600080015080040800404997635002024001020240000202400008004080040118002110901010800008000001016001313042160052025016003961012411210502011160182180037800009916000080000800108004280042800418004180041
240024800406201001000056002800253161522252400108001016000080010160000204489436627320080015080040800404997635002024001020240000202400008004080040118002110901010800008000001016001214041160052005216000061050421300502015160181980037800009916000080000800108004180041800418004180041
240024800406211010000056002800252161515252400108001016000080010160000204489436672550080015080040800414997535002024001020240000202400008004080040118002110901010800008000001016001213042160050005016003861050411200502019160182080038800009916000080000800108004180041800418004180041
240024800406211000000057002800253161617252400108001016000080010160000205604636726600080015080040800404997535002024001020240000202400008004080040118002110901010800008000001016001413042160051005016003861050411200502019160202180037800009916000080000800108004180041800418004180041
240024800406201000000056002800252161617252400108001016000080010160000205610236593790080015080040800404997635002024001020240000202400008004080040118002110901010800008000001016001413041160050015016003761050411300502020160202180037800009916000080000800108004180041800418004180041
240024800406211011000056002800250161617452400108001016000080010160000204695336709460080015080040800404997535002024001020240000202400008004080040118002110901010800008000001016001413042160052015016003861050421200502017160101880037800009916000080000800108004180041800418004180041
24002480040621101100005600280025315017252400108001016000080010160000205610236760280080015080040800404997635002024001020240000202400008004080040118002110901010800008000001016001213042160053105216003961050421200502021160182080037800000916000080000800108004180041800418004280041
240024800406211000000057002800252161617252400108006916011080010160000205610236726600080015080040800404997535002024001020240000202400008004080040118002110901010800008000001016001414042160050015216003701052421320502018160212180037800009916000080000800108004180041800418004180042
24002480040620101100005600280025201515252400108001016000080010160000204804536593470080015080040800404997635002024001020240000202400008004080040118002110901010800008000001016001213042160053005216003861052421210502014160161980113800629916000080000800108004180041800418004180041
24002480040621100110005800280025216161725240010800101600008001016000020561023659379008001508004080163500621750183240253202400002024000080040804181180021109010108000080000110160014132384216005100211111619746110550411300502028331181880440800009916000080000800108004180041800428004180041