Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
ldrh w0, [x6, w7, sxtw]
mov x7, #4 mov x8, 0
(no loop instructions)
Retires: 1.000
Issues: 1.000
Integer unit issues: 0.000
Load/store unit issues: 1.000
SIMD/FP unit issues: 0.000
| retire uop (01) | cycle (02) | 03 | 09 | 0e | 0f | 1e | 22 | 23 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule ldst uop (55) | dispatch ldst uop (58) | simd uops in schedulers (5a) | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst int load (95) | inst ldst (9b) | 9d | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ea | eb | ec | ? ldst retires (ed) | f5 | f6 | f7 | f8 | fd |
| 1005 | 394 | 3 | 1 | 0 | 0 | 44 | 1 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15274 | 398 | 394 | 221 | 3 | 252 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1039 | 0 | 38 | 1038 | 6 | 1 | 39 | 43 | 73 | 1 | 16 | 1 | 1 | 391 | 14 | 10 | 7 | 1000 | 399 | 395 | 399 | 395 | 395 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 1 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15208 | 398 | 394 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1038 | 0 | 38 | 1038 | 6 | 1 | 39 | 44 | 73 | 1 | 16 | 1 | 1 | 391 | 10 | 10 | 7 | 1000 | 399 | 395 | 395 | 399 | 395 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15267 | 398 | 398 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1038 | 0 | 38 | 1038 | 6 | 1 | 39 | 44 | 73 | 1 | 16 | 1 | 1 | 391 | 10 | 10 | 4 | 1000 | 399 | 399 | 399 | 399 | 399 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15267 | 398 | 398 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 44 | 1038 | 0 | 38 | 1038 | 6 | 1 | 39 | 44 | 73 | 1 | 16 | 1 | 1 | 395 | 14 | 14 | 7 | 1000 | 399 | 399 | 399 | 399 | 399 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 1 | 0 | 1 | 383 | 2 | 1 | 12 | 19 | 25 | 1000 | 1000 | 1000 | 15018 | 394 | 398 | 216 | 3 | 252 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1039 | 0 | 38 | 1038 | 6 | 1 | 39 | 44 | 73 | 2 | 16 | 1 | 1 | 395 | 14 | 10 | 7 | 1000 | 399 | 399 | 399 | 399 | 399 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15370 | 398 | 398 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 44 | 1038 | 0 | 38 | 1038 | 6 | 1 | 39 | 43 | 73 | 1 | 16 | 1 | 1 | 395 | 14 | 10 | 7 | 1000 | 399 | 399 | 395 | 399 | 399 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 383 | 2 | 1 | 1 | 16 | 25 | 1000 | 1000 | 1000 | 15267 | 398 | 398 | 221 | 3 | 252 | 1000 | 1000 | 2000 | 394 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1039 | 0 | 39 | 1039 | 6 | 1 | 39 | 43 | 73 | 1 | 16 | 1 | 1 | 391 | 10 | 10 | 4 | 1000 | 395 | 395 | 395 | 395 | 395 |
| 1004 | 394 | 3 | 0 | 0 | 0 | 44 | 1 | 0 | 1 | 383 | 2 | 12 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15274 | 398 | 398 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1038 | 0 | 39 | 1039 | 6 | 1 | 39 | 44 | 73 | 1 | 16 | 1 | 1 | 391 | 14 | 10 | 4 | 1000 | 399 | 399 | 399 | 399 | 399 |
| 1004 | 398 | 3 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 383 | 2 | 1 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 15208 | 398 | 398 | 221 | 3 | 256 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 1 | 1000 | 44 | 1038 | 0 | 38 | 1038 | 6 | 1 | 38 | 44 | 73 | 1 | 16 | 1 | 1 | 391 | 14 | 14 | 7 | 1000 | 399 | 395 | 399 | 395 | 399 |
| 1004 | 398 | 3 | 0 | 1 | 0 | 45 | 0 | 0 | 1 | 383 | 2 | 12 | 1 | 19 | 25 | 1000 | 1000 | 1000 | 14989 | 398 | 398 | 221 | 3 | 252 | 1000 | 1000 | 2000 | 398 | 77 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 43 | 1039 | 0 | 38 | 1038 | 6 | 1 | 39 | 44 | 73 | 1 | 16 | 1 | 1 | 395 | 14 | 10 | 4 | 1000 | 399 | 399 | 395 | 395 | 399 |
Chain cycles: 3
Code:
ldrh w0, [x6, w7, sxtw] eor x8, x8, x0 eor x8, x8, x0 add x6, x6, x8
mov x7, #4 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code, minus 3 chain cycles): 4.0060
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 0e | 0f | 1e | 22 | 23 | 3a | 3f | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6b | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | a9 | ac | af | b5 | bb | l1d cache miss ld nonspec (bf) | l1d tlb miss nonspec (c1) | c2 | branch cond mispred nonspec (c5) | cd | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40205 | 70057 | 525 | 1 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 70026 | 69702 | 59719 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616087 | 3342878 | 1 | 49 | 66980 | 0 | 70060 | 70060 | 64656 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 1 | 1 | 10001 | 2 | 0 | 1 | 10000 | 1 | 1 | 1 | 1 | 2 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 0 | 10 | 13 | 10000 | 30100 | 70061 | 70061 | 70061 | 70061 | 70055 |
| 40204 | 70057 | 525 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 70045 | 69791 | 59719 | 25 | 40104 | 30103 | 10002 | 30100 | 10000 | 616068 | 3341769 | 1 | 49 | 66980 | 0 | 70060 | 70060 | 64656 | 3 | 64944 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 1 | 100 | 10002 | 2 | 1 | 10001 | 40 | 0 | 1 | 10000 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69804 | 30003 | 0 | 13 | 13 | 10000 | 30100 | 70042 | 70061 | 70061 | 70058 | 70108 |
| 40204 | 70062 | 559 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 70042 | 69791 | 59701 | 25 | 40104 | 30106 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 64050 | 0 | 70060 | 70060 | 64728 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 1 | 1 | 10001 | 53 | 1 | 1 | 10000 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69804 | 30003 | 13 | 0 | 13 | 10000 | 30100 | 70058 | 70061 | 70061 | 70154 | 70089 |
| 40204 | 70041 | 525 | 1 | 1 | 1 | 0 | 0 | 2 | 1 | 0 | 0 | 70045 | 69722 | 59701 | 25 | 40104 | 30103 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 66961 | 0 | 70057 | 70057 | 64664 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70041 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10005 | 2 | 1 | 10001 | 13 | 0 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69804 | 30006 | 13 | 0 | 10 | 10000 | 30100 | 70089 | 70058 | 70058 | 70058 | 70058 |
| 40204 | 70041 | 525 | 1 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 1 | 70042 | 69900 | 59719 | 25 | 40108 | 30103 | 10002 | 30100 | 10000 | 616095 | 3342542 | 1 | 49 | 66980 | 0 | 70041 | 70060 | 64653 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 1 | 1 | 10002 | 0 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 13 | 0 | 13 | 10000 | 30100 | 70061 | 70042 | 70058 | 70144 | 70042 |
| 40204 | 70060 | 524 | 1 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 70045 | 69788 | 59753 | 25 | 40104 | 30106 | 10002 | 30100 | 10000 | 616078 | 3342686 | 1 | 49 | 66980 | 0 | 70060 | 70041 | 64661 | 3 | 64944 | 40100 | 30200 | 10000 | 60200 | 20000 | 70057 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 3 | 1 | 10004 | 0 | 0 | 1 | 10000 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 0 | 0 | 13 | 10000 | 30100 | 70058 | 70058 | 70058 | 70058 | 70059 |
| 40204 | 70041 | 524 | 1 | 0 | 1 | 0 | 0 | 2 | 1 | 0 | 0 | 70028 | 69788 | 59701 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 66980 | 0 | 70057 | 70041 | 64637 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 2 | 1 | 10001 | 0 | 0 | 1 | 10000 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 0 | 13 | 0 | 10000 | 30100 | 70042 | 70042 | 70058 | 70140 | 70061 |
| 40204 | 70057 | 525 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 70045 | 69866 | 59752 | 25 | 40108 | 30103 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 66961 | 0 | 70057 | 70041 | 64656 | 3 | 64963 | 40100 | 30200 | 10000 | 60200 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 2 | 0 | 10003 | 0 | 2 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69804 | 30006 | 10 | 0 | 0 | 10000 | 30100 | 70042 | 70061 | 70042 | 70180 | 70061 |
| 40204 | 70041 | 524 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 70042 | 69788 | 59778 | 25 | 40104 | 30103 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 66985 | 0 | 70060 | 70041 | 64656 | 3 | 64944 | 40100 | 30200 | 10000 | 60596 | 20000 | 70060 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 1 | 1 | 10002 | 0 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 13 | 13 | 0 | 10000 | 30100 | 70061 | 70061 | 70058 | 70151 | 70058 |
| 40204 | 70060 | 524 | 1 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 0 | 70045 | 69874 | 59717 | 25 | 40104 | 30103 | 10002 | 30100 | 10000 | 616095 | 3342686 | 1 | 49 | 66980 | 0 | 70060 | 70041 | 64637 | 3 | 64960 | 40100 | 30200 | 10000 | 60200 | 20000 | 70041 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 2 | 1 | 10001 | 0 | 0 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69823 | 30006 | 13 | 13 | 13 | 10000 | 30100 | 70061 | 70061 | 70140 | 70122 | 70058 |
Result (median cycles for code, minus 3 chain cycles): 4.0047
| retire uop (01) | cycle (02) | 03 | mmu table walk instruction (07) | 09 | 0e | 0f | 18 | 1e | 22 | 23 | 3f | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6b | 6d | 6e | map stall dispatch (70) | int prf full (71) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | bb | l1d cache miss ld nonspec (bf) | c2 | branch mispred nonspec (cb) | cf | d0 | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40025 | 70035 | 525 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 70032 | 69728 | 59695 | 25 | 40014 | 30013 | 10002 | 30010 | 10000 | 617068 | 3342062 | 0 | 49 | 66967 | 0 | 70084 | 70047 | 64653 | 0 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 20000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 1 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 1 | 1 | 69813 | 30003 | 9 | 6 | 9 | 10000 | 30010 | 70051 | 70036 | 70036 | 70036 | 70036 |
| 40024 | 70047 | 525 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 70032 | 69728 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 616952 | 3341470 | 1 | 49 | 66975 | 0 | 70147 | 70070 | 64669 | 0 | 3 | 64975 | 40010 | 30020 | 10000 | 60020 | 20000 | 70035 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 2 | 2 | 69798 | 30003 | 6 | 0 | 9 | 10000 | 30010 | 70051 | 70048 | 70051 | 70051 | 70048 |
| 40024 | 70047 | 525 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 70032 | 69728 | 59706 | 25 | 40014 | 30013 | 10000 | 30010 | 10000 | 616952 | 3342062 | 1 | 49 | 66967 | 0 | 70050 | 70047 | 64665 | 0 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 20000 | 70035 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 1 | 71 | 2 | 2 | 69813 | 30000 | 9 | 6 | 9 | 10000 | 30010 | 70036 | 70036 | 70036 | 70048 | 70048 |
| 40024 | 70050 | 524 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 70032 | 69728 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 616982 | 3342062 | 0 | 49 | 66955 | 0 | 70047 | 70047 | 64665 | 0 | 3 | 64963 | 40010 | 30020 | 10000 | 60020 | 20000 | 70047 | 35 | 1 | 1 | 40022 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 1 | 71 | 1 | 2 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30010 | 70051 | 70036 | 70051 | 70048 | 70048 |
| 40024 | 70047 | 525 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 70032 | 69728 | 59709 | 25 | 40014 | 30010 | 10001 | 30010 | 10000 | 616982 | 3342206 | 1 | 49 | 67019 | 0 | 70047 | 70048 | 64665 | 0 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 20000 | 70035 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 2 | 1 | 69813 | 30003 | 6 | 6 | 6 | 10000 | 30010 | 70048 | 70048 | 70048 | 70036 | 70048 |
| 40024 | 70035 | 524 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 70035 | 69728 | 59695 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 616952 | 3342062 | 0 | 49 | 66960 | 0 | 70047 | 70035 | 64665 | 0 | 3 | 64975 | 40010 | 30020 | 10000 | 60020 | 20000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 2 | 1 | 69798 | 30003 | 6 | 6 | 9 | 10000 | 30010 | 70036 | 70051 | 70051 | 70051 | 70036 |
| 40024 | 70035 | 525 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 70032 | 69743 | 59706 | 25 | 40010 | 30013 | 10001 | 30010 | 10000 | 616952 | 3341470 | 0 | 49 | 66967 | 0 | 70047 | 70047 | 64665 | 0 | 3 | 64977 | 40010 | 30020 | 10000 | 60020 | 20000 | 70035 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 0 | 10000 | 30010 | 70051 | 70051 | 70048 | 70050 | 70036 |
| 40024 | 70047 | 525 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 70020 | 69760 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 616952 | 3342446 | 1 | 49 | 66973 | 0 | 70035 | 70050 | 64668 | 0 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 20000 | 70035 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 2 | 1 | 69813 | 30003 | 0 | 9 | 9 | 10000 | 30010 | 70048 | 70048 | 70051 | 70048 | 70048 |
| 40024 | 70047 | 524 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 70035 | 69760 | 59709 | 25 | 40018 | 30013 | 10001 | 30010 | 10000 | 616952 | 3342206 | 1 | 49 | 66972 | 0 | 70047 | 70047 | 64665 | 0 | 3 | 64972 | 40010 | 30020 | 10000 | 60408 | 20000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 1 | 0 | 0 | 2520 | 0 | 1 | 71 | 1 | 1 | 69861 | 30003 | 6 | 6 | 17 | 10000 | 30010 | 70049 | 70051 | 70048 | 70036 | 70048 |
| 40024 | 70050 | 525 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 70032 | 69728 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617068 | 3341470 | 0 | 49 | 66973 | 0 | 70047 | 70047 | 64668 | 0 | 3 | 64975 | 40010 | 30020 | 10000 | 60020 | 20000 | 70050 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 0 | 0 | 1 | 0 | 0 | 2520 | 0 | 2 | 71 | 1 | 1 | 69813 | 30000 | 9 | 0 | 6 | 10000 | 30010 | 70048 | 70048 | 70048 | 70048 | 70051 |
Chain cycles: 3
Code:
ldrh w0, [x6, w7, sxtw] eor x8, x8, x0 eor x8, x8, x0 add x7, x7, x8
mov x7, #4 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code, minus 3 chain cycles): 4.0047
| retire uop (01) | cycle (02) | 03 | 0e | 0f | 1e | 1f | 22 | 23 | 3f | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | l1d cache miss ld nonspec (bf) | branch cond mispred nonspec (c5) | branch mispred nonspec (cb) | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40205 | 70047 | 524 | 1 | 0 | 1 | 0 | 1 | 0 | 70032 | 69784 | 59716 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 1 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70048 | 70119 | 70048 |
| 40204 | 70047 | 525 | 0 | 0 | 1 | 0 | 1 | 0 | 70032 | 69735 | 59741 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70035 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70109 | 70048 | 70048 | 70144 | 70048 |
| 40204 | 70047 | 524 | 0 | 0 | 1 | 0 | 1 | 0 | 70032 | 69735 | 59758 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 618397 | 3341470 | 0 | 49 | 64007 | 70049 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10067 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 0 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70048 | 70131 | 70048 |
| 40204 | 70047 | 525 | 0 | 0 | 6 | 0 | 1 | 0 | 70032 | 69735 | 59745 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 70092 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70393 | 70048 | 70048 | 70048 |
| 40204 | 70047 | 524 | 0 | 0 | 1 | 0 | 0 | 1 | 70032 | 69735 | 59795 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 620622 | 3342158 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30526 | 10000 | 60200 | 20000 | 70321 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 1 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30000 | 0 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70130 | 70058 | 70051 |
| 40204 | 70047 | 524 | 0 | 0 | 0 | 0 | 0 | 1 | 70032 | 69820 | 59707 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70048 | 70126 | 70048 |
| 40204 | 70047 | 524 | 0 | 0 | 6 | 0 | 0 | 1 | 70032 | 69816 | 59708 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 0 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70048 | 70137 | 70048 |
| 40204 | 70047 | 524 | 0 | 0 | 1 | 0 | 0 | 1 | 70032 | 69735 | 59729 | 25 | 40104 | 30114 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 1 | 0 | 10000 | 1 | 1 | 0 | 0 | 2646 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70160 | 70038 | 70048 | 70048 | 70052 |
| 40204 | 70047 | 525 | 0 | 0 | 1 | 0 | 0 | 1 | 70032 | 69884 | 59730 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70047 | 70047 | 64643 | 3 | 64953 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10008 | 1 | 10003 | 1 | 2273 | 10000 | 0 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 0 | 10000 | 30100 | 70055 | 70230 | 70065 | 70192 | 70048 |
| 40204 | 70047 | 525 | 0 | 0 | 1 | 0 | 0 | 1 | 70032 | 69797 | 59761 | 25 | 40104 | 30103 | 10001 | 30100 | 10000 | 616015 | 3342062 | 0 | 49 | 66967 | 70035 | 70047 | 64643 | 3 | 64950 | 40100 | 30200 | 10000 | 60200 | 20000 | 70047 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70048 | 70048 | 70049 | 70048 | 70080 |
Result (median cycles for code, minus 3 chain cycles): 4.0059
| retire uop (01) | cycle (02) | 03 | mmu table walk instruction (07) | 09 | l2 tlb miss instruction (0a) | 0e | 18 | 19 | 1e | 1f | 22 | 23 | 3f | 43 | 49 | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6b | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | a9 | ac | af | b5 | bb | l1d cache miss ld nonspec (bf) | cd | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40025 | 70065 | 524 | 0 | 0 | 0 | 0 | 0 | 0 | 14 | 0 | 1 | 0 | 70044 | 1 | 1 | 69784 | 59887 | 25 | 40018 | 30013 | 10002 | 30010 | 10000 | 616912 | 3341867 | 1 | 49 | 66999 | 0 | 70059 | 70043 | 64677 | 3 | 64984 | 40010 | 30020 | 10000 | 60020 | 20000 | 70043 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 0 | 10001 | 0 | 0 | 1 | 10001 | 1 | 1 | 1 | 0 | 2520 | 6 | 71 | 3 | 4 | 69822 | 30006 | 0 | 10 | 0 | 10000 | 30010 | 70064 | 70060 | 70060 | 70044 | 70060 |
| 40024 | 70059 | 524 | 0 | 0 | 0 | 0 | 0 | 4 | 2 | 0 | 1 | 0 | 70044 | 1 | 1 | 69783 | 59703 | 25 | 40018 | 30016 | 10002 | 30010 | 10000 | 616912 | 3342686 | 1 | 49 | 66979 | 0 | 70043 | 70043 | 64661 | 3 | 64984 | 40010 | 30020 | 10000 | 60020 | 20000 | 70059 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10009 | 0 | 2 | 10001 | 0 | 0 | 1 | 10001 | 1 | 1 | 0 | 0 | 2520 | 3 | 71 | 4 | 2 | 69822 | 30006 | 10 | 0 | 0 | 10000 | 30010 | 70060 | 70044 | 70060 | 70060 | 70044 |
| 40024 | 70061 | 524 | 4 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 70049 | 1 | 1 | 69704 | 59718 | 25 | 40018 | 30016 | 10002 | 30010 | 10000 | 616912 | 3341867 | 1 | 49 | 66989 | 0 | 70099 | 70064 | 64661 | 3 | 64984 | 40010 | 30020 | 10000 | 60020 | 20440 | 70059 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 2 | 10001 | 0 | 0 | 7 | 10001 | 1 | 1 | 0 | 0 | 2520 | 5 | 71 | 3 | 3 | 69806 | 30006 | 10 | 10 | 0 | 10000 | 30010 | 70044 | 70060 | 70060 | 70060 | 70066 |
| 40024 | 70405 | 525 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 1 | 0 | 70028 | 1 | 1 | 69783 | 59703 | 25 | 40018 | 30013 | 10001 | 30010 | 10000 | 617063 | 3342638 | 1 | 49 | 66979 | 0 | 70059 | 70043 | 64677 | 3 | 64968 | 40010 | 30020 | 10000 | 60020 | 20000 | 70059 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 0 | 10001 | 0 | 0 | 1 | 10001 | 1 | 1 | 0 | 0 | 2520 | 3 | 71 | 3 | 2 | 69822 | 30006 | 0 | 10 | 10 | 10000 | 30010 | 70060 | 70060 | 70060 | 70060 | 70060 |
| 40024 | 70043 | 524 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 70028 | 1 | 1 | 69708 | 59913 | 25 | 40014 | 30013 | 10002 | 30010 | 10000 | 617063 | 3342638 | 1 | 49 | 66966 | 0 | 70059 | 70060 | 64661 | 3 | 64986 | 40010 | 30020 | 10000 | 60020 | 20000 | 70043 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 2 | 10001 | 0 | 0 | 4 | 10013 | 0 | 1 | 1 | 0 | 2520 | 4 | 71 | 2 | 3 | 69822 | 30006 | 10 | 10 | 10 | 10000 | 30010 | 70060 | 70060 | 70060 | 70044 | 70060 |
| 40024 | 70059 | 525 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 70044 | 1 | 1 | 69785 | 59703 | 25 | 40018 | 30013 | 10002 | 30010 | 10000 | 616912 | 3341867 | 1 | 49 | 66989 | 0 | 70065 | 70066 | 64677 | 3 | 64984 | 40010 | 30020 | 10000 | 60020 | 20000 | 70043 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 2 | 10001 | 0 | 0 | 4 | 10001 | 0 | 0 | 1 | 0 | 2520 | 2 | 71 | 4 | 2 | 69822 | 30006 | 10 | 0 | 0 | 10000 | 30010 | 70066 | 70424 | 70060 | 70044 | 70060 |
| 40024 | 70059 | 524 | 0 | 1 | 0 | 0 | 0 | 3 | 7 | 0 | 0 | 0 | 70028 | 1 | 0 | 69783 | 59718 | 25 | 40014 | 30016 | 10002 | 30010 | 10000 | 617063 | 3342734 | 1 | 49 | 67007 | 0 | 70043 | 70059 | 64661 | 3 | 64984 | 40010 | 30020 | 10000 | 61332 | 20000 | 70043 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 2 | 10001 | 6 | 0 | 1 | 10001 | 0 | 1 | 1 | 0 | 2520 | 2 | 71 | 2 | 2 | 69822 | 30006 | 10 | 10 | 10 | 10000 | 30010 | 70060 | 70044 | 70060 | 70060 | 70060 |
| 40024 | 70059 | 525 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 70044 | 1 | 1 | 69783 | 59718 | 25 | 40014 | 30016 | 10002 | 30010 | 10000 | 617063 | 3342638 | 1 | 49 | 66979 | 0 | 70068 | 70043 | 64661 | 3 | 64968 | 40010 | 30020 | 10000 | 60020 | 20000 | 70043 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 2 | 10001 | 0 | 0 | 1 | 10001 | 1 | 1 | 0 | 0 | 2520 | 3 | 71 | 2 | 2 | 69806 | 30006 | 10 | 10 | 0 | 10000 | 30010 | 70060 | 70060 | 70060 | 70060 | 70044 |
| 40024 | 70059 | 524 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 70028 | 1 | 0 | 69783 | 59703 | 25 | 40014 | 30016 | 10002 | 30010 | 10000 | 617063 | 3342638 | 1 | 49 | 67015 | 0 | 70059 | 70059 | 64661 | 3 | 64968 | 40010 | 30020 | 10000 | 60020 | 20000 | 70059 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 2 | 2 | 10001 | 0 | 0 | 1 | 10001 | 1 | 1 | 1 | 0 | 2520 | 2 | 71 | 4 | 4 | 69822 | 30003 | 0 | 10 | 10 | 10000 | 30010 | 70060 | 70060 | 70060 | 70060 | 70060 |
| 40024 | 70043 | 525 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 70044 | 1 | 1 | 69789 | 59723 | 25 | 40018 | 30016 | 10001 | 30010 | 10000 | 617081 | 3342638 | 1 | 49 | 66990 | 0 | 70059 | 70044 | 64661 | 3 | 64984 | 40010 | 30020 | 10000 | 60020 | 20000 | 70059 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10014 | 0 | 0 | 10001 | 0 | 0 | 1 | 10001 | 0 | 1 | 1 | 0 | 2620 | 2 | 71 | 4 | 3 | 69825 | 30006 | 10 | 10 | 0 | 10000 | 30010 | 70426 | 70061 | 70060 | 70060 | 70044 |
Count: 8
Code:
ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw] ldrh w0, [x6, w7, sxtw]
mov x7, 8
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 0.3341
| retire uop (01) | cycle (02) | 03 | 09 | 0e | 0f | 19 | 1e | 22 | 23 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | branch cond mispred nonspec (c5) | branch mispred nonspec (cb) | cd | cf | d5 | map dispatch bubble (d6) | e0 | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80205 | 26728 | 200 | 1 | 1 | 1 | 0 | 44 | 0 | 0 | 1 | 26715 | 2 | 12 | 12 | 16 | 25 | 80100 | 100 | 80000 | 100 | 80015 | 500 | 1167303 | 0 | 49 | 23647 | 26727 | 26727 | 16635 | 6 | 16679 | 80115 | 200 | 80024 | 200 | 160048 | 26727 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80038 | 0 | 38 | 80000 | 6 | 1 | 39 | 44 | 1 | 1 | 1 | 5118 | 1 | 16 | 26724 | 10 | 10 | 4 | 80000 | 100 | 26728 | 26718 | 26728 | 26708 | 26708 |
| 80205 | 26707 | 200 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 26722 | 2 | 1 | 1 | 19 | 25 | 80100 | 100 | 80000 | 100 | 80015 | 500 | 1168692 | 0 | 49 | 23627 | 26731 | 26731 | 16659 | 6 | 16679 | 80114 | 200 | 80024 | 200 | 160048 | 26707 | 56 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80039 | 0 | 0 | 80039 | 6 | 0 | 0 | 43 | 1 | 1 | 1 | 5118 | 0 | 16 | 26724 | 0 | 10 | 4 | 80000 | 100 | 26732 | 26708 | 26732 | 26732 | 26732 |
| 80204 | 26731 | 200 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 26697 | 0 | 0 | 12 | 16 | 25 | 80100 | 100 | 80000 | 100 | 80015 | 500 | 1177116 | 0 | 49 | 23627 | 26731 | 26707 | 16659 | 6 | 16683 | 80114 | 200 | 80024 | 200 | 160048 | 26731 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80000 | 0 | 38 | 80038 | 6 | 1 | 39 | 44 | 1 | 1 | 1 | 5118 | 0 | 16 | 26728 | 0 | 14 | 7 | 80000 | 100 | 26732 | 26708 | 26732 | 26732 | 26732 |
| 80204 | 26707 | 200 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 26717 | 2 | 1 | 1 | 19 | 25 | 80100 | 100 | 80000 | 100 | 80016 | 500 | 1166596 | 0 | 49 | 23627 | 26731 | 26731 | 16659 | 6 | 16679 | 80115 | 200 | 80024 | 200 | 160048 | 26707 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80000 | 0 | 39 | 80000 | 6 | 1 | 0 | 43 | 1 | 1 | 1 | 5118 | 0 | 16 | 26704 | 10 | 0 | 4 | 80000 | 100 | 26728 | 26728 | 26728 | 26708 | 26972 |
| 80204 | 26727 | 200 | 0 | 0 | 0 | 0 | 45 | 0 | 0 | 1 | 26695 | 0 | 0 | 12 | 0 | 25 | 80100 | 100 | 80000 | 100 | 80014 | 500 | 1166596 | 0 | 49 | 23665 | 26711 | 26710 | 16635 | 6 | 16659 | 80116 | 200 | 80024 | 200 | 160048 | 26727 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80130 | 0 | 0 | 80038 | 0 | 1 | 39 | 44 | 1 | 1 | 1 | 5118 | 0 | 16 | 26704 | 0 | 0 | 4 | 80000 | 100 | 26728 | 26732 | 26732 | 26708 | 26732 |
| 80204 | 26707 | 200 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 0 | 26719 | 2 | 0 | 0 | 0 | 25 | 80100 | 100 | 80000 | 100 | 80013 | 500 | 1166596 | 0 | 49 | 23651 | 26707 | 26733 | 16667 | 6 | 16683 | 80114 | 200 | 80024 | 200 | 160048 | 26707 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 1 | 100 | 80000 | 0 | 80038 | 0 | 39 | 80000 | 6 | 1 | 39 | 43 | 1 | 1 | 1 | 5118 | 0 | 16 | 26724 | 0 | 10 | 4 | 80000 | 100 | 26728 | 26728 | 26728 | 26728 | 26728 |
| 80204 | 26727 | 200 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 26692 | 0 | 12 | 1 | 19 | 25 | 80100 | 100 | 80000 | 100 | 80015 | 500 | 1168380 | 1 | 49 | 23647 | 26731 | 26731 | 16659 | 6 | 16659 | 80114 | 200 | 80024 | 200 | 160048 | 26731 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 1 | 100 | 80000 | 43 | 80000 | 0 | 0 | 80039 | 0 | 1 | 38 | 0 | 1 | 1 | 1 | 5118 | 0 | 16 | 26724 | 0 | 14 | 7 | 80000 | 100 | 26732 | 26732 | 26708 | 26732 | 26732 |
| 80204 | 26731 | 200 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 1 | 26719 | 2 | 1 | 1 | 18 | 25 | 80100 | 100 | 80000 | 100 | 80017 | 500 | 1167198 | 0 | 49 | 23627 | 26707 | 26731 | 16635 | 6 | 16683 | 80114 | 200 | 80024 | 200 | 160048 | 26727 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80038 | 0 | 39 | 80039 | 6 | 1 | 0 | 0 | 1 | 1 | 1 | 5118 | 0 | 16 | 26724 | 0 | 10 | 0 | 80000 | 100 | 26708 | 26708 | 26728 | 26708 | 26728 |
| 80204 | 26727 | 200 | 0 | 0 | 0 | 0 | 46 | 0 | 0 | 0 | 26725 | 2 | 12 | 0 | 16 | 25 | 80100 | 100 | 80000 | 100 | 80014 | 500 | 1167303 | 1 | 49 | 23651 | 26731 | 26731 | 16635 | 6 | 16683 | 80115 | 200 | 80024 | 200 | 160048 | 26727 | 77 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 43 | 80038 | 0 | 0 | 80000 | 6 | 1 | 38 | 43 | 1 | 1 | 1 | 5118 | 0 | 16 | 26728 | 14 | 10 | 4 | 80000 | 100 | 26732 | 26732 | 26708 | 26728 | 26732 |
| 80204 | 26731 | 200 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 26717 | 2 | 0 | 1 | 19 | 25 | 80100 | 100 | 80000 | 100 | 80015 | 500 | 1168380 | 1 | 49 | 23651 | 26707 | 26707 | 16655 | 6 | 16683 | 80114 | 200 | 80024 | 200 | 160048 | 26731 | 56 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80000 | 0 | 39 | 80000 | 0 | 1 | 39 | 43 | 1 | 1 | 1 | 5118 | 0 | 16 | 26724 | 14 | 14 | 7 | 80000 | 100 | 26732 | 26732 | 26732 | 26732 | 26728 |
Result (median cycles for code divided by count): 0.3342
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 0e | 0f | 18 | 19 | 1e | 1f | 22 | 23 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss ld (a3) | a5 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | l1d tlb miss nonspec (c1) | c2 | cf | d0 | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80025 | 26733 | 200 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 22 | 0 | 1 | 0 | 3 | 26717 | 2 | 18 | 0 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1165304 | 49 | 23658 | 26734 | 26714 | 16677 | 3 | 16694 | 80010 | 20 | 80000 | 20 | 160000 | 26714 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 1 | 10 | 80019 | 19 | 42 | 0 | 80057 | 0 | 0 | 0 | 21 | 80038 | 6 | 1 | 19 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 5 | 3 | 26729 | 0 | 9 | 2 | 80000 | 10 | 26715 | 26715 | 26715 | 26733 | 26734 |
| 80024 | 26715 | 201 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 65 | 0 | 1 | 0 | 2 | 26717 | 2 | 0 | 18 | 15 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1168280 | 49 | 23657 | 26733 | 26715 | 16677 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26732 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80020 | 20 | 0 | 0 | 80019 | 0 | 0 | 1 | 59 | 80130 | 6 | 1 | 57 | 42 | 19 | 1 | 5020 | 0 | 3 | 16 | 3 | 5 | 26712 | 9 | 9 | 2 | 80000 | 10 | 26733 | 26715 | 26715 | 26733 | 26716 |
| 80024 | 26714 | 200 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 21 | 0 | 1 | 0 | 2 | 26717 | 2 | 18 | 18 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1167660 | 49 | 23771 | 26740 | 26732 | 16680 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26732 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80020 | 19 | 42 | 0 | 80058 | 1 | 0 | 1 | 59 | 80038 | 6 | 1 | 57 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 3 | 5 | 26729 | 9 | 9 | 2 | 80000 | 10 | 26734 | 26733 | 26715 | 26733 | 26716 |
| 80024 | 26732 | 200 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 21 | 0 | 1 | 0 | 1 | 26700 | 0 | 0 | 18 | 0 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1170204 | 49 | 23656 | 27316 | 26736 | 16684 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26733 | 64 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80019 | 19 | 42 | 0 | 80057 | 0 | 0 | 0 | 59 | 80000 | 6 | 1 | 57 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 5 | 3 | 26729 | 9 | 0 | 2 | 80000 | 10 | 26733 | 26734 | 26734 | 26716 | 26733 |
| 80024 | 26714 | 200 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 21 | 0 | 0 | 0 | 1 | 26700 | 2 | 18 | 18 | 15 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1167599 | 49 | 23665 | 26733 | 26732 | 16677 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26733 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80020 | 19 | 0 | 0 | 80019 | 0 | 0 | 0 | 59 | 80038 | 6 | 1 | 57 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 5 | 3 | 26712 | 0 | 9 | 0 | 80000 | 10 | 26733 | 26733 | 26733 | 26733 | 26734 |
| 80024 | 26732 | 200 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 65 | 0 | 0 | 0 | 3 | 26699 | 0 | 18 | 18 | 15 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1167599 | 49 | 23652 | 26740 | 26732 | 16677 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26733 | 64 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80020 | 20 | 42 | 0 | 80055 | 0 | 0 | 0 | 21 | 80038 | 6 | 0 | 58 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 5 | 5 | 26729 | 9 | 9 | 2 | 80000 | 10 | 26733 | 26733 | 26733 | 26733 | 26715 |
| 80024 | 26732 | 200 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 65 | 0 | 0 | 0 | 0 | 26717 | 2 | 0 | 18 | 1 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1170204 | 49 | 23650 | 26732 | 26715 | 16660 | 3 | 16694 | 80010 | 20 | 80000 | 20 | 160000 | 26732 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80021 | 21 | 42 | 0 | 80019 | 1 | 0 | 1 | 59 | 80000 | 0 | 1 | 57 | 41 | 19 | 0 | 5020 | 0 | 3 | 16 | 5 | 5 | 26729 | 0 | 9 | 2 | 80000 | 10 | 26733 | 26734 | 26716 | 26716 | 26733 |
| 80024 | 26732 | 200 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 21 | 0 | 1 | 0 | 3 | 26700 | 2 | 0 | 18 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1167298 | 49 | 23665 | 26732 | 26715 | 16660 | 3 | 16712 | 80010 | 20 | 80000 | 20 | 160000 | 26715 | 82 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80020 | 20 | 0 | 0 | 80057 | 0 | 0 | 0 | 59 | 80000 | 0 | 1 | 57 | 0 | 19 | 1 | 5020 | 0 | 5 | 16 | 4 | 5 | 26712 | 9 | 9 | 2 | 80000 | 10 | 26734 | 26733 | 26733 | 26715 | 26716 |
| 80024 | 26732 | 200 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 64 | 0 | 1 | 0 | 1 | 26700 | 2 | 0 | 18 | 15 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1166815 | 49 | 23652 | 26734 | 26723 | 16671 | 3 | 16694 | 80010 | 20 | 80000 | 20 | 160000 | 26735 | 81 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80021 | 20 | 40 | 0 | 80019 | 2 | 0 | 1 | 58 | 80038 | 0 | 1 | 19 | 42 | 19 | 1 | 5020 | 0 | 5 | 16 | 7 | 5 | 26729 | 9 | 0 | 2 | 80000 | 10 | 26733 | 26733 | 26733 | 26733 | 26832 |
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