Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
ldursh w0, [x6, #1]
mov x0, 1 mov x1, 2 mov x8, 0
(no loop instructions)
Retires: 1.000
Issues: 1.000
Integer unit issues: 0.000
Load/store unit issues: 1.000
SIMD/FP unit issues: 0.000
| retire uop (01) | cycle (02) | 03 | mmu table walk instruction (07) | 09 | l2 tlb miss instruction (0a) | 0e | 0f | 1e | 22 | 23 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule ldst uop (55) | dispatch ldst uop (58) | simd uops in schedulers (5a) | 60 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst int load (95) | inst ldst (9b) | 9d | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ea | eb | ec | ? ldst retires (ed) | f5 | f6 | f7 | f8 | fd |
| 1005 | 402 | 3 | 1 | 1 | 1 | 0 | 0 | 64 | 1 | 0 | 2 | 388 | 17 | 0 | 0 | 20 | 25 | 1000 | 1000 | 1000 | 14583 | 1 | 402 | 402 | 225 | 3 | 260 | 1000 | 1000 | 1000 | 402 | 85 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1055 | 0 | 55 | 1055 | 6 | 1 | 25 | 0 | 75 | 5 | 16 | 6 | 6 | 400 | 10 | 10 | 0 | 1000 | 384 | 403 | 384 | 403 | 403 |
| 1004 | 382 | 3 | 1 | 0 | 1 | 1 | 0 | 25 | 1 | 0 | 2 | 368 | 17 | 0 | 19 | 3 | 25 | 1000 | 1000 | 1000 | 15394 | 1 | 402 | 402 | 224 | 3 | 240 | 1000 | 1000 | 1000 | 402 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 0 | 1055 | 0 | 55 | 1055 | 0 | 1 | 55 | 0 | 75 | 6 | 16 | 6 | 6 | 379 | 10 | 10 | 0 | 1000 | 383 | 403 | 403 | 384 | 403 |
| 1004 | 402 | 3 | 1 | 0 | 1 | 1 | 0 | 61 | 0 | 0 | 1 | 387 | 25 | 4 | 0 | 3 | 25 | 1000 | 1000 | 1000 | 15411 | 1 | 383 | 402 | 205 | 3 | 260 | 1000 | 1000 | 1000 | 402 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1055 | 0 | 25 | 1055 | 0 | 1 | 25 | 44 | 75 | 6 | 16 | 6 | 6 | 399 | 10 | 0 | 0 | 1000 | 383 | 403 | 403 | 403 | 403 |
| 1004 | 402 | 3 | 1 | 0 | 1 | 0 | 1 | 25 | 1 | 0 | 2 | 387 | 25 | 4 | 19 | 3 | 25 | 1000 | 1000 | 1000 | 14536 | 1 | 402 | 383 | 224 | 3 | 260 | 1000 | 1000 | 1000 | 383 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 0 | 1055 | 0 | 25 | 1025 | 6 | 1 | 53 | 44 | 75 | 6 | 16 | 5 | 5 | 380 | 10 | 10 | 0 | 1000 | 403 | 403 | 384 | 384 | 403 |
| 1004 | 402 | 3 | 1 | 0 | 1 | 0 | 0 | 25 | 1 | 0 | 1 | 387 | 17 | 4 | 0 | 2 | 25 | 1000 | 1000 | 1000 | 15521 | 1 | 402 | 402 | 225 | 3 | 260 | 1000 | 1000 | 1000 | 402 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1025 | 0 | 25 | 1055 | 6 | 1 | 25 | 44 | 75 | 6 | 16 | 5 | 5 | 399 | 0 | 10 | 6 | 1000 | 383 | 384 | 384 | 403 | 383 |
| 1004 | 383 | 3 | 1 | 0 | 1 | 1 | 0 | 61 | 0 | 0 | 1 | 387 | 25 | 0 | 0 | 2 | 25 | 1000 | 1000 | 1000 | 15411 | 1 | 402 | 402 | 225 | 3 | 262 | 1000 | 1000 | 1000 | 402 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 0 | 1055 | 0 | 25 | 1055 | 6 | 0 | 25 | 44 | 75 | 6 | 16 | 6 | 6 | 380 | 10 | 10 | 6 | 1000 | 403 | 403 | 403 | 384 | 403 |
| 1004 | 382 | 3 | 1 | 0 | 1 | 0 | 0 | 61 | 1 | 0 | 2 | 387 | 25 | 4 | 19 | 20 | 25 | 1000 | 1000 | 1000 | 14580 | 1 | 402 | 402 | 224 | 3 | 260 | 1000 | 1000 | 1000 | 383 | 85 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1055 | 0 | 55 | 1056 | 6 | 1 | 25 | 0 | 75 | 6 | 16 | 6 | 6 | 399 | 0 | 0 | 6 | 1000 | 403 | 403 | 403 | 384 | 403 |
| 1004 | 383 | 3 | 1 | 0 | 1 | 0 | 0 | 61 | 0 | 0 | 2 | 367 | 25 | 0 | 19 | 3 | 25 | 1000 | 1000 | 1000 | 15423 | 1 | 402 | 402 | 205 | 3 | 241 | 1000 | 1000 | 1000 | 383 | 85 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1025 | 0 | 55 | 1055 | 6 | 0 | 25 | 44 | 75 | 6 | 16 | 5 | 6 | 399 | 10 | 0 | 6 | 1000 | 384 | 403 | 383 | 403 | 403 |
| 1004 | 402 | 3 | 1 | 0 | 1 | 0 | 0 | 61 | 0 | 0 | 2 | 387 | 17 | 4 | 19 | 20 | 25 | 1000 | 1000 | 1000 | 15423 | 1 | 402 | 402 | 226 | 3 | 260 | 1000 | 1000 | 1000 | 402 | 65 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 0 | 1025 | 0 | 55 | 1055 | 6 | 0 | 55 | 0 | 75 | 5 | 16 | 5 | 5 | 399 | 0 | 10 | 6 | 1000 | 403 | 403 | 383 | 403 | 403 |
| 1004 | 402 | 2 | 1 | 0 | 1 | 0 | 0 | 25 | 1 | 0 | 2 | 387 | 17 | 0 | 19 | 3 | 25 | 1000 | 1000 | 1000 | 15469 | 1 | 402 | 382 | 205 | 3 | 240 | 1000 | 1000 | 1000 | 402 | 85 | 1 | 1 | 1001 | 1000 | 1000 | 0 | 1000 | 59 | 1055 | 0 | 55 | 1055 | 6 | 1 | 25 | 44 | 75 | 6 | 16 | 5 | 6 | 399 | 10 | 10 | 6 | 1000 | 403 | 403 | 384 | 403 | 403 |
Chain cycles: 3
Code:
ldursh w0, [x6, #1] eor x8, x8, x0 eor x8, x8, x0 add x6, x6, x8
mov x0, 1 mov x1, 2 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code, minus 3 chain cycles): 4.0053
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 0e | 0f | 18 | 19 | 1e | 1f | 22 | 23 | 3a | 3f | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 69 | 6a | 6d | 6e | map stall dispatch (70) | int prf full (71) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss ld (a3) | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | b5 | bb | l1d cache miss ld nonspec (bf) | l1d tlb miss nonspec (c1) | c2 | cd | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40205 | 70053 | 524 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 70026 | 69784 | 59771 | 25 | 40108 | 30106 | 10002 | 30100 | 10057 | 616059 | 3342350 | 49 | 66961 | 70056 | 70053 | 64637 | 0 | 3 | 64944 | 40100 | 30200 | 10000 | 60200 | 10000 | 70056 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10003 | 1 | 1 | 10003 | 0 | 0 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 2610 | 2 | 71 | 1 | 1 | 69816 | 30006 | 6 | 6 | 0 | 10000 | 30100 | 70042 | 70057 | 70054 | 70118 | 70042 |
| 40204 | 70056 | 525 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 7 | 0 | 0 | 0 | 0 | 70041 | 69784 | 59770 | 25 | 40108 | 30106 | 10001 | 30100 | 10000 | 616059 | 3342494 | 49 | 66976 | 70059 | 70056 | 64637 | 0 | 3 | 64956 | 40100 | 30200 | 10000 | 60200 | 10000 | 70056 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 2 | 1 | 10008 | 0 | 0 | 1 | 2026 | 10003 | 1 | 1 | 1 | 1 | 2 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 9 | 6 | 9 | 10000 | 30100 | 70045 | 70042 | 70129 | 70090 | 70057 |
| 40204 | 70254 | 526 | 1 | 1 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 1 | 0 | 0 | 70026 | 69702 | 59758 | 25 | 40159 | 30106 | 10002 | 30100 | 10000 | 616032 | 3342686 | 49 | 66976 | 70053 | 70056 | 64649 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70154 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 3 | 0 | 10003 | 0 | 2 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 2 | 0 | 2610 | 1 | 71 | 1 | 1 | 69805 | 30003 | 6 | 6 | 6 | 10000 | 30100 | 70054 | 70043 | 70042 | 70042 | 70058 |
| 40204 | 70056 | 525 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 8 | 104 | 0 | 0 | 0 | 70229 | 69867 | 59813 | 25 | 40108 | 30103 | 10002 | 30100 | 10000 | 616032 | 3342494 | 49 | 66976 | 70041 | 70056 | 64652 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70056 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 2 | 1 | 10004 | 0 | 1 | 0 | 4 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 9 | 9 | 6 | 10000 | 30100 | 70042 | 70057 | 70054 | 70042 | 70054 |
| 40204 | 70056 | 525 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 13 | 0 | 0 | 0 | 0 | 70044 | 69883 | 59719 | 25 | 40108 | 30106 | 10001 | 30100 | 10000 | 616078 | 3342350 | 49 | 66976 | 70053 | 70420 | 64803 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70419 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10002 | 1 | 1 | 10001 | 1 | 0 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 6 | 6 | 9 | 10000 | 30100 | 70054 | 70054 | 70054 | 70054 | 70054 |
| 40204 | 70041 | 524 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 70026 | 69868 | 59714 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616059 | 3342494 | 49 | 66976 | 70053 | 70053 | 64649 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70056 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10003 | 2 | 1 | 10001 | 0 | 2 | 1 | 1 | 10000 | 0 | 1 | 0 | 1 | 1 | 0 | 2610 | 1 | 71 | 1 | 1 | 69804 | 30006 | 0 | 0 | 6 | 10000 | 30100 | 70067 | 70057 | 70054 | 70127 | 70057 |
| 40204 | 70056 | 525 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 70041 | 69874 | 59742 | 25 | 40104 | 30106 | 10002 | 30100 | 10000 | 616059 | 3341769 | 49 | 66976 | 70056 | 70056 | 64649 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70042 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 1 | 1 | 10002 | 0 | 0 | 1 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 2610 | 1 | 71 | 1 | 1 | 69816 | 30003 | 6 | 6 | 9 | 10000 | 30100 | 70057 | 70042 | 70054 | 70132 | 70057 |
| 40204 | 70053 | 524 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 70026 | 69784 | 59716 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616032 | 3342494 | 49 | 66961 | 70056 | 70041 | 64652 | 0 | 3 | 64956 | 40100 | 30200 | 10000 | 60200 | 10052 | 70041 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 2 | 1 | 10001 | 0 | 0 | 2 | 1 | 10000 | 1 | 1 | 1 | 1 | 1 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 9 | 9 | 0 | 10000 | 30100 | 70042 | 70054 | 70042 | 70145 | 70057 |
| 40204 | 70041 | 525 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 70026 | 69784 | 59755 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616032 | 3342494 | 49 | 66976 | 70041 | 70053 | 64649 | 0 | 3 | 64956 | 40100 | 30200 | 10000 | 60200 | 10000 | 70041 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 0 | 100 | 10001 | 1 | 1 | 10002 | 0 | 0 | 0 | 1 | 10000 | 1 | 1 | 0 | 1 | 0 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 0 | 0 | 9 | 10000 | 30100 | 70057 | 70057 | 70054 | 70134 | 70042 |
| 40204 | 70041 | 525 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 70045 | 69784 | 59739 | 25 | 40108 | 30106 | 10002 | 30100 | 10000 | 616059 | 3341769 | 49 | 66976 | 70041 | 70056 | 64649 | 0 | 3 | 64959 | 40100 | 30200 | 10000 | 60200 | 10000 | 70056 | 35 | 1 | 1 | 40201 | 100 | 99 | 100 | 10000 | 30100 | 10000 | 1 | 100 | 10002 | 3 | 1 | 10002 | 0 | 0 | 1 | 1 | 10000 | 1 | 1 | 0 | 1 | 1 | 0 | 2610 | 1 | 71 | 1 | 1 | 69819 | 30006 | 0 | 6 | 9 | 10000 | 30100 | 70042 | 70054 | 70154 | 70109 | 70057 |
Result (median cycles for code, minus 3 chain cycles): 4.0047
| retire uop (01) | cycle (02) | 03 | 09 | 0e | 0f | 1e | 22 | 23 | 3f | 4d | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | l1d cache miss ld nonspec (bf) | cf | l1i cache miss demand (d3) | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 40025 | 70047 | 525 | 0 | 0 | 0 | 1 | 1 | 0 | 70032 | 69728 | 59706 | 25 | 40022 | 30013 | 10001 | 30010 | 10000 | 616952 | 3342062 | 49 | 66967 | 70050 | 70050 | 64668 | 3 | 64978 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 14 | 71 | 7 | 5 | 69810 | 30003 | 6 | 6 | 6 | 10000 | 30010 | 70048 | 70048 | 70036 | 70048 | 70090 |
| 40024 | 70047 | 524 | 1 | 0 | 0 | 0 | 1 | 0 | 70035 | 69743 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 616952 | 3346910 | 49 | 66964 | 70047 | 70035 | 64665 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70050 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 0 | 1 | 2520 | 0 | 5 | 71 | 5 | 5 | 69810 | 30000 | 0 | 6 | 0 | 10000 | 30010 | 70051 | 70048 | 70050 | 70036 | 70048 |
| 40024 | 70035 | 525 | 0 | 0 | 0 | 1 | 0 | 0 | 70032 | 69760 | 59709 | 25 | 40010 | 30013 | 10001 | 30010 | 10000 | 617780 | 3344078 | 49 | 66976 | 70050 | 70047 | 64668 | 3 | 64975 | 40010 | 30020 | 10000 | 60020 | 10000 | 70050 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 7 | 6 | 69810 | 30003 | 0 | 6 | 6 | 10000 | 30010 | 70048 | 70036 | 70048 | 70048 | 70048 |
| 40024 | 70047 | 525 | 1 | 1 | 1 | 1 | 1 | 0 | 70032 | 69728 | 59695 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617878 | 3344174 | 49 | 66970 | 70035 | 70035 | 64668 | 3 | 64975 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 6 | 6 | 69813 | 30003 | 0 | 9 | 6 | 10000 | 30010 | 70036 | 70048 | 70048 | 70036 | 70048 |
| 40024 | 70035 | 525 | 1 | 0 | 0 | 1 | 0 | 0 | 70032 | 69728 | 59706 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617927 | 3344414 | 49 | 66967 | 70035 | 70047 | 64665 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 1 | 10 | 10003 | 0 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 5 | 5 | 69810 | 30003 | 6 | 6 | 0 | 10000 | 30010 | 70048 | 70036 | 70048 | 70048 | 70048 |
| 40024 | 70047 | 524 | 0 | 1 | 0 | 1 | 0 | 0 | 70032 | 69760 | 59709 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617725 | 3344030 | 49 | 66970 | 70050 | 70047 | 64665 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 5 | 5 | 69810 | 30003 | 9 | 6 | 0 | 10000 | 30010 | 70051 | 70048 | 70036 | 70048 | 70051 |
| 40024 | 70047 | 525 | 1 | 0 | 0 | 1 | 0 | 0 | 70058 | 69763 | 59709 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617708 | 3343166 | 49 | 66967 | 70035 | 70035 | 64665 | 3 | 64960 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 5 | 5 | 69798 | 30003 | 6 | 9 | 6 | 10000 | 30010 | 70051 | 70048 | 70051 | 70048 | 70048 |
| 40024 | 70050 | 525 | 0 | 0 | 0 | 1 | 1 | 0 | 70032 | 69743 | 59795 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617608 | 3341518 | 49 | 66967 | 70047 | 70047 | 64665 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 0 | 10000 | 1 | 0 | 2520 | 0 | 5 | 71 | 4 | 5 | 69813 | 30000 | 0 | 0 | 9 | 10000 | 30010 | 70051 | 70051 | 70051 | 70048 | 70048 |
| 40024 | 70047 | 525 | 0 | 0 | 0 | 1 | 0 | 0 | 70032 | 69728 | 59695 | 25 | 40014 | 30013 | 10000 | 30010 | 10000 | 617429 | 3342206 | 49 | 66955 | 70047 | 70047 | 64668 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70047 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 0 | 10000 | 0 | 3 | 10000 | 1 | 1 | 2520 | 0 | 6 | 71 | 5 | 6 | 69813 | 30003 | 6 | 6 | 9 | 10000 | 30010 | 70036 | 70048 | 70036 | 70048 | 70036 |
| 40024 | 70050 | 526 | 0 | 0 | 0 | 1 | 0 | 0 | 70032 | 69743 | 59695 | 25 | 40014 | 30013 | 10001 | 30010 | 10000 | 617798 | 3344798 | 49 | 66970 | 70047 | 70047 | 64668 | 3 | 64972 | 40010 | 30020 | 10000 | 60020 | 10000 | 70050 | 35 | 1 | 1 | 40021 | 10 | 9 | 10 | 10000 | 30010 | 10000 | 0 | 10 | 10000 | 1 | 10000 | 0 | 15 | 10000 | 1 | 1 | 2520 | 0 | 5 | 71 | 6 | 6 | 69810 | 30000 | 6 | 0 | 9 | 10000 | 30010 | 70036 | 70048 | 70048 | 70036 | 70036 |
Count: 8
Code:
ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1] ldursh w0, [x6, #1]
mov x7, x6 mov x8, x6 mov x9, x6 mov x10, x6 mov x11, x6 mov x12, x6 mov x13, x6
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 0.3340
| retire uop (01) | cycle (02) | 03 | 0e | 0f | 1e | 22 | 23 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6b | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | ld unit uop (a6) | l1d cache writeback (a8) | a9 | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | branch mispred nonspec (cb) | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80205 | 26724 | 200 | 0 | 0 | 45 | 0 | 0 | 1 | 26707 | 2 | 0 | 12 | 16 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1165789 | 1 | 49 | 23647 | 0 | 26707 | 26727 | 16650 | 3 | 16680 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 1 | 100 | 80000 | 39 | 80035 | 0 | 0 | 0 | 80051 | 6 | 1 | 35 | 43 | 0 | 5110 | 1 | 16 | 2 | 1 | 26729 | 10 | 6 | 4 | 80000 | 100 | 26728 | 26708 | 26728 | 26723 | 26728 |
| 80204 | 26707 | 200 | 1 | 0 | 57 | 0 | 0 | 1 | 26712 | 0 | 12 | 12 | 12 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1167808 | 1 | 49 | 23642 | 3 | 26841 | 26723 | 16633 | 3 | 16665 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 39 | 80039 | 0 | 2 | 45 | 80039 | 6 | 1 | 0 | 0 | 0 | 5110 | 1 | 16 | 1 | 1 | 26704 | 10 | 6 | 4 | 80000 | 100 | 26728 | 26728 | 26708 | 26728 | 26728 |
| 80204 | 26727 | 200 | 0 | 0 | 46 | 0 | 0 | 2 | 26712 | 0 | 12 | 12 | 12 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1159747 | 1 | 49 | 23627 | 0 | 26727 | 26707 | 16630 | 3 | 16665 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80039 | 0 | 0 | 6 | 80039 | 6 | 1 | 0 | 43 | 0 | 5110 | 1 | 16 | 2 | 1 | 26835 | 10 | 6 | 4 | 80000 | 100 | 26728 | 26728 | 26728 | 26728 | 26728 |
| 80204 | 26727 | 200 | 0 | 0 | 45 | 1 | 0 | 2 | 26712 | 2 | 12 | 0 | 16 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1166525 | 1 | 49 | 23647 | 0 | 26722 | 26722 | 16630 | 3 | 16685 | 80100 | 200 | 80000 | 200 | 80000 | 26707 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 39 | 80039 | 0 | 0 | 39 | 80039 | 6 | 1 | 35 | 0 | 0 | 5110 | 1 | 16 | 1 | 1 | 26729 | 10 | 6 | 2 | 80000 | 100 | 26728 | 26723 | 26708 | 26728 | 26708 |
| 80204 | 26727 | 200 | 0 | 0 | 45 | 1 | 0 | 2 | 26712 | 0 | 18 | 12 | 0 | 48 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1166525 | 1 | 49 | 23627 | 0 | 26722 | 26727 | 16650 | 3 | 16665 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80039 | 0 | 0 | 39 | 80000 | 6 | 1 | 0 | 43 | 0 | 5110 | 1 | 16 | 1 | 1 | 26712 | 0 | 0 | 4 | 80000 | 100 | 26708 | 26728 | 26728 | 26728 | 26728 |
| 80204 | 26727 | 200 | 0 | 0 | 45 | 0 | 0 | 0 | 26707 | 2 | 18 | 12 | 12 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1167231 | 1 | 49 | 23647 | 0 | 26722 | 26727 | 16650 | 3 | 16680 | 80100 | 200 | 80000 | 200 | 80000 | 26707 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80035 | 0 | 0 | 35 | 80035 | 6 | 0 | 0 | 43 | 0 | 5110 | 1 | 16 | 1 | 1 | 26725 | 6 | 6 | 0 | 80000 | 100 | 26708 | 26728 | 26728 | 26708 | 26708 |
| 80204 | 26722 | 200 | 0 | 0 | 45 | 0 | 0 | 0 | 26707 | 0 | 0 | 12 | 0 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1166525 | 1 | 49 | 23647 | 0 | 26722 | 26727 | 16650 | 3 | 16685 | 80100 | 200 | 80000 | 200 | 80000 | 26707 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80039 | 0 | 0 | 38 | 80000 | 0 | 1 | 35 | 39 | 0 | 5110 | 1 | 16 | 2 | 1 | 26719 | 10 | 10 | 0 | 80000 | 100 | 26728 | 26708 | 26723 | 26728 | 26728 |
| 80204 | 26707 | 200 | 0 | 0 | 41 | 0 | 0 | 0 | 26692 | 0 | 12 | 12 | 12 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1166525 | 1 | 49 | 23647 | 0 | 26727 | 26727 | 16650 | 3 | 16685 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 39 | 80035 | 0 | 0 | 35 | 80039 | 6 | 1 | 35 | 0 | 0 | 5110 | 1 | 16 | 1 | 1 | 26704 | 6 | 6 | 4 | 80000 | 100 | 26728 | 26723 | 26723 | 26728 | 26728 |
| 80204 | 26707 | 200 | 0 | 0 | 0 | 0 | 0 | 2 | 26707 | 2 | 12 | 12 | 12 | 25 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1167231 | 1 | 49 | 23627 | 0 | 26740 | 26727 | 16650 | 3 | 16685 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 56 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 39 | 80039 | 0 | 0 | 39 | 80000 | 6 | 1 | 35 | 0 | 1 | 5110 | 1 | 16 | 1 | 1 | 26707 | 0 | 6 | 4 | 80000 | 100 | 26728 | 26728 | 26708 | 26728 | 26708 |
| 80204 | 26707 | 200 | 1 | 0 | 45 | 0 | 0 | 2 | 26707 | 2 | 0 | 12 | 12 | 49 | 80100 | 100 | 80000 | 100 | 80000 | 500 | 1167231 | 1 | 49 | 23647 | 0 | 26727 | 26727 | 16630 | 3 | 16685 | 80100 | 200 | 80000 | 200 | 80000 | 26722 | 71 | 2 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 0 | 100 | 80000 | 0 | 80035 | 0 | 0 | 35 | 80039 | 6 | 1 | 35 | 0 | 0 | 5110 | 1 | 16 | 1 | 1 | 26722 | 6 | 0 | 2 | 80000 | 100 | 26723 | 26723 | 26723 | 26723 | 26723 |
Result (median cycles for code divided by count): 0.3341
| retire uop (01) | cycle (02) | 03 | mmu table walk data (08) | 0e | 0f | 18 | 19 | 1e | 1f | 22 | 24 | 3a | 3f | 43 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int load (95) | inst int alu (97) | inst ldst (9b) | 9d | 9f | l1d tlb access (a0) | l1d cache miss ld (a3) | a5 | ld unit uop (a6) | l1d cache writeback (a8) | ac | af | b5 | b6 | bb | l1d cache miss ld nonspec (bf) | branch mispred nonspec (cb) | cf | d5 | map dispatch bubble (d6) | db | dd | fetch restart (de) | e0 | ea | eb | ec | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80025 | 26737 | 200 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 26713 | 0 | 12 | 0 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1167008 | 1 | 49 | 23647 | 26728 | 26708 | 16675 | 3 | 16688 | 80010 | 20 | 80000 | 20 | 80000 | 26727 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 0 | 0 | 80039 | 0 | 39 | 80000 | 6 | 0 | 39 | 0 | 0 | 5020 | 16 | 16 | 0 | 11 | 7 | 26705 | 10 | 10 | 4 | 80000 | 10 | 26732 | 26709 | 26728 | 26732 | 26728 |
| 80024 | 26728 | 200 | 0 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 0 | 0 | 26712 | 2 | 12 | 0 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1171243 | 0 | 49 | 23647 | 26728 | 26728 | 16672 | 3 | 16708 | 80010 | 20 | 80000 | 20 | 80000 | 26731 | 56 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80000 | 0 | 39 | 80039 | 6 | 1 | 0 | 0 | 0 | 5020 | 5 | 16 | 3 | 11 | 12 | 26705 | 10 | 10 | 7 | 80000 | 10 | 26732 | 26728 | 26729 | 26728 | 26709 |
| 80024 | 26728 | 200 | 0 | 0 | 0 | 0 | 0 | 44 | 0 | 0 | 0 | 1 | 26716 | 2 | 12 | 1 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1171974 | 0 | 49 | 23648 | 26708 | 26727 | 16672 | 3 | 16688 | 80010 | 20 | 80000 | 20 | 80000 | 26708 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 0 | 0 | 80039 | 0 | 39 | 80039 | 6 | 1 | 0 | 43 | 0 | 5020 | 12 | 16 | 0 | 10 | 10 | 26705 | 10 | 10 | 0 | 80000 | 10 | 26709 | 26728 | 26728 | 26729 | 26709 |
| 80024 | 26728 | 200 | 0 | 0 | 1 | 0 | 0 | 44 | 0 | 0 | 0 | 1 | 26713 | 2 | 0 | 12 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1172798 | 0 | 49 | 23628 | 26731 | 26708 | 16672 | 3 | 16708 | 80010 | 20 | 80000 | 20 | 80000 | 26708 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80039 | 0 | 38 | 80000 | 6 | 1 | 38 | 0 | 0 | 5020 | 12 | 16 | 0 | 8 | 13 | 26725 | 10 | 0 | 4 | 80000 | 10 | 26729 | 26709 | 26729 | 26729 | 26739 |
| 80024 | 26708 | 201 | 0 | 0 | 0 | 0 | 0 | 45 | 0 | 1 | 0 | 1 | 27310 | 2 | 12 | 12 | 19 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1187718 | 0 | 49 | 23648 | 26727 | 26727 | 16676 | 3 | 16707 | 80010 | 20 | 80000 | 20 | 80000 | 26727 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 0 | 0 | 80038 | 0 | 39 | 80040 | 0 | 1 | 39 | 43 | 0 | 5020 | 10 | 16 | 0 | 13 | 13 | 26724 | 10 | 0 | 4 | 80000 | 10 | 26728 | 26709 | 26729 | 26729 | 26728 |
| 80024 | 26708 | 201 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 26693 | 0 | 1 | 0 | 19 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1177475 | 0 | 49 | 23647 | 26728 | 26708 | 16672 | 3 | 16708 | 80010 | 20 | 80000 | 20 | 80000 | 26727 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80039 | 0 | 0 | 80039 | 6 | 0 | 39 | 43 | 0 | 5020 | 12 | 16 | 0 | 10 | 6 | 26705 | 10 | 10 | 4 | 80000 | 10 | 26709 | 26729 | 26732 | 26728 | 26728 |
| 80024 | 26728 | 200 | 0 | 0 | 0 | 0 | 0 | 46 | 0 | 0 | 0 | 1 | 26693 | 2 | 12 | 1 | 19 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1172305 | 0 | 49 | 23647 | 26727 | 26708 | 16672 | 3 | 16708 | 80010 | 20 | 80000 | 20 | 80000 | 26727 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 0 | 0 | 80039 | 1 | 39 | 80000 | 6 | 1 | 39 | 44 | 0 | 5020 | 9 | 16 | 0 | 12 | 9 | 26705 | 10 | 0 | 4 | 80000 | 10 | 26732 | 26732 | 26709 | 26729 | 26729 |
| 80024 | 26727 | 200 | 0 | 0 | 0 | 0 | 0 | 45 | 0 | 1 | 0 | 1 | 26712 | 2 | 1 | 12 | 19 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1172425 | 1 | 49 | 23628 | 26727 | 26731 | 16672 | 3 | 16711 | 80010 | 20 | 80000 | 20 | 80000 | 26731 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80039 | 0 | 39 | 80000 | 0 | 1 | 39 | 43 | 0 | 5020 | 11 | 16 | 0 | 14 | 12 | 26705 | 0 | 10 | 4 | 80000 | 10 | 26729 | 26732 | 26732 | 26729 | 26709 |
| 80024 | 26708 | 200 | 0 | 0 | 0 | 0 | 0 | 45 | 0 | 1 | 0 | 1 | 26713 | 0 | 1 | 1 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1168831 | 0 | 49 | 23628 | 26727 | 26727 | 16672 | 3 | 16707 | 80010 | 20 | 80000 | 20 | 80000 | 26728 | 77 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80039 | 0 | 40 | 80039 | 0 | 0 | 39 | 43 | 0 | 5020 | 6 | 16 | 0 | 14 | 10 | 26725 | 14 | 14 | 7 | 80000 | 10 | 26709 | 26728 | 26728 | 26728 | 26709 |
| 80024 | 26728 | 200 | 0 | 0 | 1 | 0 | 0 | 45 | 0 | 0 | 0 | 1 | 26712 | 0 | 12 | 12 | 16 | 25 | 80010 | 10 | 80000 | 10 | 80000 | 50 | 1175194 | 0 | 49 | 23648 | 26708 | 26727 | 16652 | 3 | 16688 | 80010 | 20 | 80000 | 20 | 80000 | 26728 | 56 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 0 | 10 | 80000 | 43 | 0 | 80038 | 0 | 0 | 80000 | 6 | 1 | 39 | 43 | 0 | 5020 | 10 | 16 | 0 | 10 | 8 | 26728 | 7 | 0 | 4 | 80000 | 10 | 26729 | 26728 | 26732 | 26728 | 26729 |