Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

ORR (vector, immediate, 4S)

Test 1: uops

Code:

  orr v0.4s, #1
  movi v0.16b, 1

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004203716061168625100010001000264521020182037203715713189510001000100020372037111001100000073216111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715661168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203716061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100008073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038

Test 2: Latency 1->1

Code:

  orr v0.4s, #1
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150206119686251010010010000100100005002847521020018200372003718428071874010100200100082001000820037200371110201100991001001000010000111718016198000100001002003820038200382003820038
1020420037150006119686251010010010000100100005002847521120018200372003718428071874110100200100082001000820037200371110201100991001001000010000111718016198000100001002003820038200382003820038
1020420037150006119686251010010010000100100005002847521120018200372003718428061874010100200100082001000820037200371110201100991001001000010000111718016198000100001002003820038200382003820038
10204200371500025119686251010010010000100100005002847521020018200372003718428061874110100200100082001000820037200371110201100991001001000010000111717016198012100001002003820038200382003820038
1020420037150019719686251010010010000100100005002847521120018200372003718428061874110100200100082001000820037200371110201100991001001000010000111717016198010100001002003820038200382003820038
10204200371500017019686251010010010000100100005002847521020018200372003718428071874010100200100082001000820037200371110201100991001001000010000111718016198000100001002003820038200382003820038
1020420037150006119686251010010010000100100005002847521120018200372003718428071874010100200100082001000820037200371110201100991001001000010000111717016198010100001002003820038200382003820038
1020420037150006119686251010010010000100100005002847521020018200372003718428061874010100200100082001000820037200371110201100991001001000010000111718016198000100001002003820038200382003820038
1020420037150006119686251010010010000104100005002847521120018200372003718428071874110100200100082001000820037200371110201100991001001000010000111717016198000100001002003820038200382003820038
1020420037150006119686251010010010000100100005002847521020018200372008418428061874110100200100082001000820037200371110201100991001001000010000111717016198010100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa7a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500001241968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500001431968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500001601968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037149000611968625100101010000101000050284752102001820037200371844331876710010201000020100002003720037111002110910101000010000640248221978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  movi v0.16b, 0
  orr v0.4s, #1
  movi v1.16b, 0
  orr v1.4s, #1
  movi v2.16b, 0
  orr v2.4s, #1
  movi v3.16b, 0
  orr v3.4s, #1
  movi v4.16b, 0
  orr v4.4s, #1
  movi v5.16b, 0
  orr v5.4s, #1
  movi v6.16b, 0
  orr v6.4s, #1
  movi v7.16b, 0
  orr v7.4s, #1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)0318191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200751510000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111316112006001600001002006420064200642006420064
160204200631500000382580100100801001008000050064000012004420063200633218012420080000200800002006320063111602011009910010016000010000010111116112006001600001002006420064200642006420064
160204200631510000382580100100800001008000050064000012004420063200633218012420080000200800002006320063111602011009910010016000010000010111116112006001600001002006420064200642006420064
160204200631500000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010113116112006001600001002006420064200642006420064
160204200631500000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111116112006001600001002006420064200642006420064
160204200631500000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010112116132006001600001002006420064200642006420064
160204200631500000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111316112006001600001002006420064200642006420064
160204200631500000382580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111116222006001600001002006420064200642006420064
1602042006315000180382580100100800001008000055464000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111116132006001600001002006420064200642006420064
160204200631500000482580100100800001008000050064000012004420063200633218010020080000200800002006320063111602011009910010016000010000010111116112006001600001002006420064200642006420064

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)0307191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc2cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0? int output thing (e9)eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024200851500002532780012128000012800006264000001102004020059200593218001220800002080000200592005911160021109101016000010053010042166235344221716200562402160000102006020060200602006020060
16002420059150000502980012128000012800006264000001102004020059200599218001220800002080000200592005911160021109101016000010000010045168217344221116200472402160000102006020060200602005120060
16002420050150000922980012128000012800006264000001102004020059200593218001220800002080000200592005911160021109101016000010000010045169220344221015200562401160000102006020060200602006020060
16002420050150000442980012128000012800006264000001102004020050200593218001220800002080000200592005911160021109101016000010000010044139214344221113200562402160000102006020060200602006020060
16002420059151000502980012128000012800006264000011102004020059200593218001220800002080000200592005911160021109101016000010000010039138213344121813200562402160000102006020060200602006020060
16002420059150000502980012128000012800006264000001102004020059200593218001220800002080000200592005911160021109101016000010000010036138117252111813200472201160000102005120051200512005120051
16002420050150000442780012128000012800006264000011102003120050200503218001220800002080000200502005011160021109101016000010000010035138111252111312200472201160000102005120051200512005120051
1600242005015000044278001212800001280000626400001110200312005020050321800122080000208000020050200501116002110910101600001000001004038119252112115200472201160000102005120051200512005120051
1600242005015000044278001212800001280000626400001002009320050200503218001220800002080000200502005011160021109101016000010003010034138118254111213200472201160000102005120051200512005120051
16002420050150000442980012128000012800006264000011102003120050200503218001220800002080000200502005011160021109101016000010000010034169113254211411200472201160000102005120051200512005120060

Test 4: throughput

Count: 16

Code:

  orr v0.4s, #1
  orr v1.4s, #1
  orr v2.4s, #1
  orr v3.4s, #1
  orr v4.4s, #1
  orr v5.4s, #1
  orr v6.4s, #1
  orr v7.4s, #1
  orr v8.4s, #1
  orr v9.4s, #1
  orr v10.4s, #1
  orr v11.4s, #1
  orr v12.4s, #1
  orr v13.4s, #1
  orr v14.4s, #1
  orr v15.4s, #1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)030918191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204400593000000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
160204400383000010040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000010010110216224003501600001004003940039400394003940039
160204400382990000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
160204400382990000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
1602044003830000000705251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
160204400383000000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
160204400382990000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
160204400383000000040251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001002000010110216224003501600001004003940039400394003940039
1602044003830000000189251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039
16020440038299000003832251601001001600001001600005001120016140019400384003819973319996160100200160000200160000400384003811160201100991001001600001000000010110216224003501600001004003940039400394003940039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0307080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002440049300000003304525160010101600001016000050112001611540020400384003819989320011160010201600002016000040038400381116002110910101600001000001000100228311617212131640035208160000104003940039400394003940039
1600244003830000000004525160010101600001016000050112001611540019400384003819989320011160010201600002016000040038400381116002110910101600001000000000100223511417211201740035208160000104003940039400394003940039
160024400383000000000904251600101016000010160000501120016100400204003840038199892820011160010201600002016000040038400381116002110910101600001000000000100228511517211101540035208160000104003940039400394003940039
160024400383000000000452516001010160000101600005011200161154001940038400381998932001116001020160000201600004003840038111600211091010160000100000000010024851917211131340035208160000104003940039400394003940039
1600244003829900000005125160010101600001016000050112001611540019400384003819989320011160010201600002016000040038400381116002110910101600001000000000100223611317411121240035208160000104003940039400394003940039
160024400382990000000452516001010160000101600005011200161110400194003840038199893200111600102016000020160000400384003811160021109101016000010000000001002213621217211161440035208160000104003940039400394003940039
160024400383000000000452516001010160000101600005011200161110400194003840038199893200111600102016000020160000400384003811160021109101016000010000000001002213611717211151340035208160000104003940039400394003940039
160024400382990000000452516001010160000101600005011200161110400194003840038199893200111600102016000020160000400384003811160021109101016000010000000001002213111517211161440035208160000104003940039400394003940039
160024400383000000000452516001010160000101600005011200161110400684003840038199893200111600102016000020160000400384003811160021109101016000010000000001002213611417221141540035208160000104003940039400394003940039
1600244003830000000480452516001010160000101600005011200161010400194003840038199893200111600102016000020160000400384003811160021109101016000010000000001002213611217211131240035208160000104003940039400394003940039