Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SLI (vector, 2S)

Test 1: uops

Code:

  sli v0.2s, v1.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03181e1f3a3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371500008216872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371500006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371509006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371500006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715000010316872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371500006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371500006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
10042037160180006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203716039006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371621478816116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038

Test 2: Latency 1->1

Code:

  sli v0.2s, v1.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)0309181e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204200371501024010319687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071021611197910100001002018120038200382003820038
1020420037150001806119687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038
102042003715000006119687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000103071011611197910100001002003820038200382003820038
102042003715000006119687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038
1020420037150006010319687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038
102042003715003006119676251013310010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010002000071011611198270100001002003820038200382003820038
102052003715000916119687251013410010000108100006702847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038
1020420037150000076819687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038
102042003715000606119687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000003071011611197910100001002003820038200382003820038
102042003715000006119687251010010010000100100005002847680120018020037200371842231874510100200100002002000020037200371110201100991001001000010000000071011611197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8a9c2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420037150276119687251001010100001010000502847680020018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020054020085200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020018020037200371844431876710010201000020200002003720037111002110910101000010020640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680120018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680120018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020018320085200851844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680120018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715006119687251001010100001010000502847680020018020037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038

Test 3: Latency 1->2

Code:

  sli v0.2s, v0.2s, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03091e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd0d2d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204200371500006119686251010010610000100100005002847521002001820037200371842871874010100200100082002001620037200371110201100991001001000010000111718000160019801100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521052001820037200371842871874010100200100082002001620037200371110201100991001001000010000111717000160019801100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842871874110100200100082002001620037200371110201100991001001000010000111718000160019800100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874010100200100082002001620037200371110201100991001001000010000111718000160019800100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874010100200100082002001620037200371110201100991001001000010000111717000160019800100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874010100200100082002001620037200371110201100991001001000010000111718000160019801100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874110100200100082002001620037200371110201100991001001000010000111718000160019800100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874110100200100082002001620037200371110201100991001001000010000111717000160019800100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521002001820037200371842861874010100200100082002001620037200371110201100991001001000010000111718510160019801100001002003820038200382003820038
10204200371500006119686251010010010000100100005002847521152001820037200371842861874010100200100082002001620037200371110201100991001001000010000111718000160019800100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03081e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a7a8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420037150006119686251001010100001010000502847521020018200372003718443318767100102010000202000020037200371110021109101010000100000240640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
1002420037150002311968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
10024200371500061196862510010101000010100005028475210200182003720037184433187881001020100002020000200372003711100221091010100001000001470640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038
100242003715000611968625100101010000101000050284752102001820037200371844331878510010201000020200002003720037111002110910101000010000000640216221978610000102003820038200382003820038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  sli v0.2s, v8.2s, #3
  movi v1.16b, 0
  sli v1.2s, v8.2s, #3
  movi v2.16b, 0
  sli v2.2s, v8.2s, #3
  movi v3.16b, 0
  sli v3.2s, v8.2s, #3
  movi v4.16b, 0
  sli v4.2s, v8.2s, #3
  movi v5.16b, 0
  sli v5.2s, v8.2s, #3
  movi v6.16b, 0
  sli v6.2s, v8.2s, #3
  movi v7.16b, 0
  sli v7.2s, v8.2s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2509

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200781510292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016002006201600001002006620066200662006620066
160204200651500292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016002006201600001002006620066200662006620066
160204200651500292580116100800161008002850064019612004420065200656128012820080028200160056200652006511160201100991001001600001000311110119016002006201600001002006620066200662006620066
160204200651500292580116100800161008002850064019612004420065200656128012820080028200160056200652006511160201100991001001600001000311110119016002006201600001002006620066200662006620066
1602042006515005902580116100800161008002850064019612004420065200656128012820080028200160056200652006511160201100991001001600001000311110119016002006201600001002006620066200662006620066
160204200651510292580116100800161008002850064019612004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016002012901600001002006620066200662006620066
160204200651510292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016002006201600001002006620066200662006620066
1602042006515002925801161008001610080028500640196120044200652006561280128200800282001600562006520065111602011009910010016000010003011110119016002006201600001002006620066200662006620066
160204200651500292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000311110119016002006201600001002006620066200662006620066
160204200651500292580116100800161008002850064019612004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016002006201600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2507

retire (01)cycle (02)03071e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420075150004427800101080000108000050640000115200312005020050321800102080000201600002005020050111600211091010160000100001810028134172521154200472711160000102005120051200512005120051
16002420050150094427800101080000108000050640000111020031200502005032180010208000020160000200502005011160021109101016000010000010026137132521135200472851160000102005120051200512005120051
16002420050150004427800101080000108000050640000111020031200502005032180010208000020160000200502005011160021109101016000010000010028138152521153200472711160000102005120051200512005120051
16002420050150004427800101080000108000050640000111020031200502005032180010208000020160000200502005011160021109101016000010000010031138252541253200472761160000102006020060200602005120060
16002420059150104429800101080000108000050640000011020040200592005932180010208000020160000200592005911160021109101016000010000010029169133422297200562862160000102006020060200602005120060
16002420059150005029800101080000108000050640000111020040200592005932180010208000020160000200592005911160021109101016000010000010031168252541253203762621160000102006020060200602005120051
16002420059150004429800101080000108000050640000011020040200592005032180010208000020160202201372012721160021109101016000010000010029169236722235200562772160000102005120060200602006020060
16002420059153005027800101080000108000050640000011020040200592005932180010208000020160000200502005911160021109101016000010200010028168133422235203752681160000102006020051204732005120060
16002420059150005029800101080000108000050640000111020040200592005032180010208000020160000200502005911160021109101016000010000010029169253422135200562682160000102006020060200512006020060
16002420059150005029800101080000108000050640000011020040200502005932180010208000020160000200502005011160021109101016000010020010029167252522145200473032160000102006020060200512006020060

Test 5: throughput

Count: 16

Code:

  sli v0.2s, v16.2s, #3
  sli v1.2s, v16.2s, #3
  sli v2.2s, v16.2s, #3
  sli v3.2s, v16.2s, #3
  sli v4.2s, v16.2s, #3
  sli v5.2s, v16.2s, #3
  sli v6.2s, v16.2s, #3
  sli v7.2s, v16.2s, #3
  sli v8.2s, v16.2s, #3
  sli v9.2s, v16.2s, #3
  sli v10.2s, v16.2s, #3
  sli v11.2s, v16.2s, #3
  sli v12.2s, v16.2s, #3
  sli v13.2s, v16.2s, #3
  sli v14.2s, v16.2s, #3
  sli v15.2s, v16.2s, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)030708191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc5branch mispredict (cb)cdcfd5d6dbdde0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440059300000029251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038300000029251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038300000071251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038299000629251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038300000029251601081001600081001600205001280132040019340038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
160204400383000000292516010810016000810016002050012801320400190400384003819977619989160120200160032200320064400384003811160201100991001001600001000000111101370160040035161600001004003940039400394003940039
160204400383000000694251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038300000029251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038299000029251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000011110118016004003501600001004003940039400394003940039
16020440038300000029251601081001600081001600205001280132040019040038400381997761998916012020016003220032006440038400381116020110099100100160000100000311110118016004003501600001004003940039401004003940177

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)03080a191e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9acbranch mispredict (cb)cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024400493000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622416440435400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622516435442400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622216430444400354015160000104011340111402204003940039
1600244003830000000572516001010160000101600005012800001400194003840038199893200111600102016000020320000400384003811160021109101016000010000000100246222163537444400354015160000104003940039400394003940039
1600244003829900000241251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622216438433400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622416437444400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400382116002110910101600001000000010024622416437444400356015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622316441434400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622316437444400354015160000104003940039400394003940039
160024400383000000051251600101016000010160000501280000140019400384003819989320011160010201600002032000040038400381116002110910101600001000000010024622516436443400354015160000104003940039400394003940039