Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SLI (vector, 4H)

Test 1: uops

Code:

  sli v0.4h, v1.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371506116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715756116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715246116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371596116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
10042037151986116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371506116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371506116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371506116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371506116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
100420371506116872510001000100026468002018203720371572318951000100020002037203711100110000073116111787100020382038203820382038

Test 2: Latency 1->1

Code:

  sli v0.4h, v1.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a7a8a9acc2c5cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715010000061196872510100100100001001000050028476801200182003720037184223187451010020010000200203342003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
1020420037150000000611968725101001001000010010000500284768012001820037200371842231874510100200100002002000020037200371110201100991001001000010000000000710116111979113100001002008420038200382003820038
102042003715000000161196872510100100100001001000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000002000071011611197910100001002003820038200382003820038
102042003715000000061196872510100100100001001000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
102042003715000000061196872510100100100001181000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000001030071011611197910100001002003820038200382003820038
102042003715000000061196872510100100100001001000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000000030071011611197910100001002003820038200382003820038
102042003715000000061196872510100100100001001000050028476801200182003720037184223187451010020010000200200002008420037111020110099100100100001000000000071011611197910100001002003820038200382003820038
102042003714900000061196872510100100100001101000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000001000071011611197910100001002003820038200382003820038
1020420037150000210061196872510100100100001001000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
102042003715000000061196876210100100100121001000050028476801200182003720037184223187451010020010000200200002003720037111020110099100100100001000001000071011611197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100242003715000475196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640316221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
100242003715000611968725100101010000101000050284768020018200372003718444318767100102010000202000020037200371110021109101010000102543640216221978510000102003820038200382003820038
10024200371501061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
1002420037150006119687251001010100001010000502847680200182003720037184443187671001020100002020000200372003711100211091010100001002818640216221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020203382003720084211002110910101000010000640216221978510000102003820038200382003820038
10024200371500061196872510010101000010100005028476802001820037200371844431876710010201000020200002003720037111002110910101000010000640216221978510000102003820038200382003820038

Test 3: Latency 1->2

Code:

  sli v0.4h, v0.4h, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b1e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715110000611968625101001001000010010000500284752102001820037200371842871874110100200100082002001620037200371110201100991001001000010000001117170160019800100001002003820038200382003820038
102042003715000000611968625101001001000010010000500284752102001820037200371842871874010100200100082002001620037200371110201100991001001000010000001117180160019800100001002003820038200382003820038
102042003714900000611968625101001001000010010000500284752102001820037200371842861874110100200100082002001620037200371110201100991001001000010001001117170160019801100001002003820038200382003820038
1020420037150001200611968625101001001000010010000500284752112001820037200371842871874010100200100082002001620037200371110201100991001001000010004001117390160019800100001002013420038200382003820038
1020420037150000011181967525101001001000010010000500284752102001820037200371841161873310254200100002042000020037200372110201100991001001000010001001117222242219787100001002003820038200382003820038
102042003715000001971968625101001001000010010000500284752102001820037200371840961873310100200100002002000020037200371110201100991001001000010002091117222242219787100001002003820038200382003820038
1020420037150000019719686251010010010048100100005002847521020018200372003718409618733101002001000020020000200372003711102011009910010010000100062031117222242219787100001002003820038200382003820038
102042003715000001971968625101001001000010010000500284752102001820037200371840961873310100200100002002000020037200371110201100991001001000010000001117222242219787100001002003820038200382003820038
1020420037150000011811968625101001001000010010000500284752102001820037200371842361873310100200101662002000020037200371110201100991001001000010000001117222242219787100001002003820038200382003820038
102042003715000001971968625101001001000010010000500284752102001820037200371840961873310100200100002002000020037200371110201100991001001000010000001117222242219787100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371550611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010001640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382008620038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640316331978610000102003820038200382003820038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  sli v0.4h, v8.4h, #3
  movi v1.16b, 0
  sli v1.4h, v8.4h, #3
  movi v2.16b, 0
  sli v2.4h, v8.4h, #3
  movi v3.16b, 0
  sli v3.4h, v8.4h, #3
  movi v4.16b, 0
  sli v4.4h, v8.4h, #3
  movi v5.16b, 0
  sli v5.4h, v8.4h, #3
  movi v6.16b, 0
  sli v6.4h, v8.4h, #3
  movi v7.16b, 0
  sli v7.4h, v8.4h, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042008815129258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110121016102006201600001002006620066200662006620066
1602042006515129258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001001311110120016002006201600001002006620066200662006620066
1602042006515029258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016112006201600001002006620066200662006620066
1602042006515029258011610080016100800285006401962004420065200656338012820080028200160056200652006511160201100991001001600001000011110119016202006201600001002006620066200662006620066
1602042006515029258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016022006201600001002006620066200662006620066
16020420065150140258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110119016112006201600001002006620066200662006620066
1602042006515029258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000311110121016012006201600001002006620066200662006620066
1602042006515052258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110120116102006201600001002006620066200662006620066
1602042006515029258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001001311110120116102006201600001002006620066200662006620066
160204200651501055258011610080016100800285006401962004420065200656128012820080028200160056200652006511160201100991001001600001000011110121216202006201600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)0308090a0b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9acc2cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600242008215000000000215127800101080000108000050640000110200312005020050321800102080000201600002005020050111600211091010160000100000001003131111344224820056402160000102006020060200602006020060
160024200591510000000014402980010108000010800005064000001020040200592005932180010208000020160000200592005911160021109101016000010000000100323118252118420047201160000102005120051200512005120051
1600242005015000000000116732980010108000010800005064000001020040200592005932180010208000020160000200592005911160021109101016000010000000100313118252115820047201160000102005120051200512005120051
160024200501500000000011092780010108000010800005064000011020031200502005032180010208000020160000200502005011160021109101016000010000000100313118252119520047201160000102005120051200512005120051
16002420050150000000001492780010108000010800005064000011020031200502005034280010208000020160000200502005011160021109101016000010000000100318319252118420047201160000102005120051200512005120060
1600242005015000000012012452780010108000010800005064000011520031200502005032180010208000020160000200502005011160021109101016000010000402100318314252118420047201160000102005120137200512005120051
16002420050150000000002442780010108000010800005064000011520035201292005032180108208000020160200200502005021160021109101016000010000000100318318252118420047201160000102005120051200512005120051
160024200501500000000011952780010108000010800005064000011520031200502005032180010208000020160000200502005011160021109101016000010001000100318318252118420047201160000102005120051200512005120051
16002420050150000000001442780010108000010800005064000011520031200502005032180010208000020160000200502005011160021109101016000010001000100278314252114820047201160000102005120051200512005120051
160024200501500000000011282780010108000010800005064000011520031200502005032180010208000020160000200502005011160021109101016000010001030100318319252115820047201160000102005120051200512005120051

Test 5: throughput

Count: 16

Code:

  sli v0.4h, v16.4h, #3
  sli v1.4h, v16.4h, #3
  sli v2.4h, v16.4h, #3
  sli v3.4h, v16.4h, #3
  sli v4.4h, v16.4h, #3
  sli v5.4h, v16.4h, #3
  sli v6.4h, v16.4h, #3
  sli v7.4h, v16.4h, #3
  sli v8.4h, v16.4h, #3
  sli v9.4h, v16.4h, #3
  sli v10.4h, v16.4h, #3
  sli v11.4h, v16.4h, #3
  sli v12.4h, v16.4h, #3
  sli v13.4h, v16.4h, #3
  sli v14.4h, v16.4h, #3
  sli v15.4h, v16.4h, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)0308090b18191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440038300000000194271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
16020440047299000000752716010010016000010016000050012800004002840047400471997161999316010020016000020032000040047400471116020110099100100160000100003301111012032433400441600001004004840048400484004840048
16020440047300000010752716010010016000010016000050012800004002840047400471997161999316010020016000020032000040047400471116020110099100100160000100057001111012032433400441600001004004840048400484004840048
16020440047300000000170271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048
1602044004730000000075271601001001600001001600005001280000400284004740047199716199931601002001600002003200004004740047111602011009910010016000010000001111012032433400441600001004004840048400484004840048

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0304091e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9facbranch mispredict (cb)cdcfd0d2icache miss (d3)itlb miss (d4)d5d6d9dadbddinst fetch restart (de)e0eaebec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024400513001100099425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241351161161112432400351650160000104003940039400394003940039
16002440038300110019425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241381126161113622400351650160000104003940039400394003940039
160024400383001100010025160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241371121161113526400351650160000104003940039400394003940039
160024400383001100110025160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241371137163123737400351650160000104003940039400394003940039
16002440038300110009425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241371119161113225400351650160000104003940039400394003940039
16002440038300110009425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100231371129161112532400351650160000104003940039400394003940039
1600244003830011010817425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100231351132163222232400353150160000104003940039400394003940039
16002440038300000009425160010101600001216000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100231371132161113222400351650160000104003940039400394003940039
16002440038300110019425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100231371133161113131400351650160000104003940039400394003940039
16002440038300110009425160010101600001016000050128000011104001940038400381999603200181600102016000020320000400384003811160021109101016000010000100241371131161113118400351650160000104003940039400394003940039